Texas Instruments TPS3510DR

Overview

TPS3510DR from Texas Instruments is a dedicated power supply supervisor IC for PC ATX and industrial switching power supplies, providing overvoltage (12 V/5 V/3.3 V), undervoltage (5 V/3.3 V), fault protection latching, open-drain PGO and FPO outputs, and 300-ms power-good delay. It operates from 4 V to 15 V and supports –40°C to 85°C ambient.

For engineers reviewing the TPS3510DR datasheet, TPS3510DR pinout, TPS3510DR application, or TPS3510DR equivalent, this page delivers verified functional roles, timing-critical thresholds (e.g., 3.9 V OV on VS33, 3.5 V UV on VS5), noise-immune 73-µs deglitching, and precise 75-ms short-circuit turnon protection - all essential for reliable ATX PSU design and validation.

Technical Context

The TPS3510DR integrates independent comparators with bandgap references (0.95 V and 1.15 V) for PGI monitoring, plus dedicated OV/UV detection paths for VS33, VS5, and VDD (12 V). Its internal latch architecture ensures fault conditions (e.g., 5 V UV or 12 V OV) hold FPO high until PSON toggles low→high.

It implements three critical timing blocks: 75-ms UV enable delay after PSON assertion, 2.3-ms PSON-to-FPO turnoff delay, and a fixed 300-ms PGI-to-PGO power-good delay (distinguishing it from the 150-ms TPS3511). All inputs feature 73-µs noise deglitching, and both FPO and PGO are open-drain with 20 mA and 10 mA sink capability respectively.

Key Specifications

Pinout & Package

TPS3510DR is housed in an 8-pin SOIC (D) package per JEDEC MS-012, 3.91 mm body width, 1.75 mm max height, with Gull-wing leads and RoHS-compliant NiPdAu finish. Pin 1 is located at top-left corner (Q1 quadrant in tape).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply supervision applications.

Compared with TPS3510DR, TPS3511DR offers faster power-good response but sacrifices ATX compliance, while TLV809E33DBZR provides basic voltage monitoring only - neither replicates the integrated OV/UV/FPO/PGO/PSON architecture essential for robust PC or industrial PSU supervision.

Availability

TPS3510DR is available at Aetrix Electronics and suitable for ATX power supply manufacturing, industrial SMPS design, and medical equipment power integrity validation requiring stable component supply across long production lifecycles.

Supply support for TPS3510DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in power integrity solutions.

The TPS3510DR belongs to TI's power-supply supervisor product line, engineered specifically for ATX-compliant PC power supplies and rugged industrial SMPS systems requiring hardware-enforced fault containment and precise timing.

FAQ

What is the primary function of the TPS3510DR in an ATX power supply?

The TPS3510DR serves as the core hardware supervisor in ATX power supplies, continuously monitoring 12 V (via VDD), 5 V (VS5), and 3.3 V (VS33) rails for overvoltage and undervoltage conditions. It generates a latched fault signal (FPO) and a delayed power-good output (PGO) to coordinate safe system boot and shutdown. The TPS3510DR ensures compliance with ATX timing specifications including the mandatory 300-ms PGO delay and 75-ms short-circuit turnon protection window.

How does the TPS3510DR handle fault conditions, and how is the fault cleared?

The TPS3510DR latches its FPO output high upon detection of any OV or UV event - whether on VS33, VS5, or VDD - and holds it until the PSON pin transitions from low to high. This deliberate reset mechanism prevents automatic recovery during persistent faults. The TPS3510DR does not auto-clear; it requires an explicit hardware reset pulse on PSON, ensuring system-level control over fault recovery. During latched fault, PGO remains low and main power rails are disabled.

What is the significance of the 73-µs noise deglitch time specified for the TPS3510DR?

The 73-µs deglitch time is a hardware filter applied to all input pins (PGI, VS33, VS5, VDD) of the TPS3510DR, rejecting transient noise spikes shorter than this duration. This eliminates false triggering from EMI, switching noise, or contact bounce without requiring external RC networks. The TPS3510DR uses this fixed deglitch interval to distinguish between benign transients and genuine OV/UV events, directly enhancing system reliability in electrically noisy environments like server chassis or industrial enclosures.

Can the TPS3510DR be used in applications outside of ATX power supplies?

Yes - the TPS3510DR is widely deployed in industrial SMPS, PLC power modules, and medical equipment where multi-rail supervision, hardware fault latching, and deterministic timing are critical. Its –40°C to 85°C operating range, 4–15 V supply flexibility, and open-drain FPO/PGO outputs make it suitable for non-ATX designs requiring robust power integrity. However, users must verify that the fixed 300-ms PGO delay and 75-ms UV enable timing align with their specific system requirements - the TPS3510DR is not configurable.

What are the key differences between TPS3510DR and TPS3511DR?

The TPS3510DR and TPS3511DR share identical pinout, package, and core functionality, but differ in two critical parameters: the TPS3510DR has a 300-ms PGO delay and is rated for –40°C to 85°C, whereas the TPS3511DR has a 150-ms PGO delay and extends to –40°C to 125°C. These differences make the TPS3510DR the correct choice for ATX compliance, while the TPS3511DR suits high-temperature industrial applications where faster power-good assertion is acceptable. They are not interchangeable without revalidating timing behavior.