Texas Instruments TPS3510P

Overview

TPS3510P from Texas Instruments is a dedicated power-supply supervisor IC for PC ATX and industrial switching power supplies, providing overvoltage (12 V/5 V/3.3 V), undervoltage (5 V/3.3 V), fault latching, open-drain PGO/FPO outputs, and 300-ms power-good delay. It operates from 4 V to 15 V supply and supports –40°C to 85°C ambient.

For engineers reviewing the TPS3510P datasheet, TPS3510P pinout, TPS3510P application, or TPS3510P equivalent, key selection considerations include its 75-ms short-circuit turnon protection, 2.3-ms PSON-to-FPO shutdown delay, 73-µs OVP noise deglitching, and PDIP-8 package compatibility with legacy motherboard designs requiring through-hole mounting and thermal robustness.

Technical Context

The TPS3510P integrates independent comparators for 12 V (via VDD), 5 V (VS5), and 3.3 V (VS33) overvoltage detection plus dual-threshold (0.95 V / 1.15 V) PGI monitoring and 5 V/3.3 V undervoltage sensing. All fault conditions trigger latchable FPO high and immediate PGO low with 150-µs debounce.

Its timing architecture includes a fixed 300-ms PGI-to-PGO assertion delay, 75-ms UVP enable delay after PSON low, 38-ms PSON input debounce, and 2.3-ms PSON-to-FPO turnoff delay - all implemented via internal RC timers without external components.

Key Specifications

Pinout & Package

TPS3510P uses an 8-pin PDIP (Plastic Dual In-line Package) with 0.3-inch body width, through-hole mounting, and 13.97 mm × 5.08 mm footprint. Pin 1 is marked by a notch or dot at the top-left corner of the package.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply supervision applications.

Compared with TPS3510P, TPS3510DR offers identical functionality in surface-mount form for modern production, while TPS3511DR trades ATX-compliant 300-ms delay for faster response and higher temperature rating - neither is pin-compatible with PDIP-8, requiring layout change.

Availability

TPS3510P is available at Aetrix Electronics and suitable for ATX power supply manufacturing, industrial SMPS refurbishment, and legacy motherboard repair requiring stable component supply with long-term traceability and RoHS-compliant sourcing.

Supply support for TPS3510P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in power integrity solutions.

The TPS3510P belongs to TI's power-supply supervisor product line, engineered specifically for PC ATX and industrial switching power supplies requiring integrated OV/UVP, fault latching, and precise power-good timing without external components.

FAQ

What is the primary function of the TPS3510P in a power supply system?

The TPS3510P serves as a dedicated power-supply supervisor IC that monitors +12 V (via VDD), +5 V (VS5), and +3.3 V (VS33) rails for overvoltage and undervoltage conditions, generates a delayed power-good signal (PGO), and provides a latched fault-protection output (FPO). Its core function is to ensure safe, sequenced startup and shutdown of ATX and industrial switching power supplies without external timing components.

Does the TPS3510P require external components to set its overvoltage thresholds?

No, the TPS3510P does not require external resistors to set overvoltage thresholds. Its VS33 and VS5 pins directly monitor 3.3 V and 5 V rails with internal fixed thresholds (3.9 V and 6.1 V typ), while the VDD pin simultaneously serves as the supply input and 12 V overvoltage monitor (13.8 V typ threshold). This eliminates external voltage dividers and simplifies design.

How does the TPS3510P handle short-circuit conditions during power-on?

The TPS3510P implements 75-ms short-circuit turnon protection: after PSON is asserted low, UVP monitoring is intentionally delayed for 75 ms to prevent false triggering during initial rail ramp-up. This allows the power supply to stabilize before enabling undervoltage detection - a critical safeguard against nuisance shutdowns during safety testing or production line shorts.

What is the significance of the 300-ms power-good delay in the TPS3510P?

The 300-ms power-good delay in the TPS3510P is a fixed internal timer that ensures the PGO output remains low until all monitored inputs (PGI, VS33, VS5) have been valid for 300 ms. This matches the ATX specification requirement for delayed power-good assertion, guaranteeing that +3.3 V and +5 V rails are fully stabilized and capable of supporting CPU and chipset operation before releasing system reset.

Can the TPS3510P be used in place of the TPS3511 series?

The TPS3510P cannot be used as a direct replacement for the TPS3511 series due to its 300-ms PGO delay versus the TPS3511's 150-ms delay. While both share identical pinout and monitoring functions, the timing difference violates ATX compliance for systems requiring the longer delay. Substitution would require verification of system-level timing margins and may cause premature CPU release or instability.