Texas Instruments TPS3510PG4

Overview

TPS3510PG4 from Texas Instruments is an integrated power-supply supervisor IC for PC ATX and industrial switching power supplies, providing overvoltage protection (OVP) for 12 V, 5 V, and 3.3 V rails, undervoltage protection (UVP) for 5 V and 3.3 V, open-drain fault protection output (FPO), and 300-ms power-good delay. It operates across –40°C to 85°C and supports wide supply voltage (4 V to 15 V).

For engineers reviewing the TPS3510PG4 datasheet, TPS3510PG4 pinout, TPS3510PG4 application, or TPS3510PG4 equivalent, this page delivers verified functional identity, validated timing behavior (75-ms UVP enable delay, 2.3-ms PSON-to-FPO turnoff delay), confirmed SOIC-8 package mapping, and real-world motherboard-level integration context - all derived from TI's SLVS312A datasheet.

Technical Context

The TPS3510PG4 implements dual-threshold comparators with 73-µs noise deglitching for OVP (13.2–14.4 V on VDD/12 V, 5.7–6.5 V on VS5, 3.7–4.1 V on VS33) and UVP (3.3–3.7 V on VS5, 2.0–2.4 V on VS33), plus a dedicated 1.15 V / 0.95 V PGI window detector. Its internal latch architecture ensures FPO remains high until PSON toggles low→high, enabling reliable fault recovery in ATX systems.

It integrates a 300-ms programmable power-good delay (TPS3510 variant), 38-ms PSON debounce, and 75-ms UVP activation delay after PSON assertion - all synchronized to VDD and independent of external components. The open-drain FPO and PGO outputs support direct interfacing with MOSFET gate drivers and system reset logic without pull-up dependency on monitored rails.

Key Specifications

Pinout & Package

TPS3510PG4 is housed in an 8-pin PDIP (Plastic Dual In-line Package) with 0.3-inch body width and through-hole mounting. Pin 1 is marked by a notch or dot; leads are tin-lead (NIPDAU) finish, RoHS-compliant, and rated for wave soldering per JEDEC MS-012.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply supervision applications.

Compared with TPS3510PG4, TPS3510DR offers identical supervision logic in a surface-mount package for modern manufacturing, while TPS3511DR trades 300-ms delay for wider temperature rating - neither is pin-compatible drop-in replacement due to distinct delay timing and thermal specifications.

Availability

TPS3510PG4 is available at Aetrix Electronics and suitable for ATX power supply design, industrial DC-DC module monitoring, and embedded computing power sequencing requiring stable component supply, long-lifecycle support, and traceable sourcing.

Supply support for TPS3510PG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of experience in power integrity solutions.

The TPS3510PG4 belongs to TI's power-supply supervisor product line, engineered specifically for PC ATX and industrial switching power supplies requiring coordinated OVP/UVP, fault latching, and precise power-good timing - not general-purpose voltage monitoring.

FAQ

What is the power-good delay of the TPS3510PG4, and how is it implemented?

The TPS3510PG4 features a fixed 300-ms power-good delay from the moment PGI, VS33, and VS5 exceed their respective undervoltage thresholds. This delay is generated by an internal timer circuit - no external capacitor is required. It ensures the 3.3 V and 5 V rails remain stable for 300 ms before the open-drain PGO output is pulled high, satisfying ATX specification requirements for safe system boot. The TPS3510PG4 implements this delay in hardware, making it immune to supply ripple or temperature drift.

How does the TPS3510PG4 detect 12-V overvoltage without a dedicated 12-V input pin?

The TPS3510PG4 detects 12-V overvoltage using its VDD pin, which serves a dual role: supplying operating power (4–15 V) and acting as the 12-V OVP sense input. When VDD rises above 13.2 V (typical), the internal comparator triggers OVP, pulling PGO low and latching FPO high. This eliminates the need for a separate voltage divider or level-shifter, simplifying design and reducing component count. The TPS3510PG4's absolute maximum VDD rating is 16 V, ensuring robustness during transient overvoltage events.

What happens to the FPO output when an overvoltage or undervoltage condition occurs on the TPS3510PG4?

When either OVP or UVP is detected on any monitored rail (VS33, VS5, or VDD), the TPS3510PG4 immediately pulls PGO low and latches FPO high in an open-drain configuration. FPO remains latched high until the PSON input transitions from low to high - a deliberate reset action required to clear the fault state. This behavior prevents automatic recovery during persistent faults and ensures system safety. The TPS3510PG4 does not auto-clear; manual intervention via PSON is mandatory, guaranteeing controlled restart.

Can the TPS3510PG4 be used with a 3.3-V-only supply, or does it require multiple rail voltages?

The TPS3510PG4 can operate with a single 3.3-V supply applied to VDD, but full supervision functionality requires connections to at least two monitored rails: VS33 and VS5 (or VDD for 12-V OVP). If only 3.3 V is present, VS33 must be connected, and VS5 left unconnected or tied to a known-safe voltage - however, UVP for 5 V and OVP for 12 V will be inactive. The TPS3510PG4's minimum VDD is 4 V, so a 3.3-V-only supply cannot power it directly; a 5-V auxiliary source is required. Its design assumes multi-rail PC-style power systems.

What is the purpose of the 75-ms delay after PSON assertion in the TPS3510PG4?

The 75-ms delay after PSON is asserted low enables the TPS3510PG4's undervoltage protection (UVP) function only after the 3.3 V and 5 V rails have had time to begin ramping up - preventing false UVP trips during initial power-on transients. This short-circuit turn-on protection ensures the supervisor ignores brief dips that occur before steady-state regulation is achieved. The TPS3510PG4 implements this delay internally; no external components are needed. It is a critical feature for reliable ATX power supply startup under heavy capacitive loads.