Texas Instruments TPS3511D

Overview

TPS3511D from Texas Instruments is a dedicated power-supply supervisor IC for PC ATX and industrial switching power supplies, providing overvoltage (12 V/5 V/3.3 V), undervoltage (5 V/3.3 V), fault latching, open-drain PGO and FPO outputs, and 150-ms power-good delay. It operates from 4 V to 15 V and supports –40°C to 125°C ambient temperature.

For engineers reviewing the TPS3511D datasheet, TPS3511D pinout, TPS3511D application, or TPS3511D equivalent, this page delivers verified functional roles, timing-critical parameters (e.g., 75-ms UVP enable delay, 2.3-ms PSON-to-FPO turnoff delay), terminal-specific design meanings, and validated alternative options for PC power control subsystems.

Technical Context

The TPS3511D implements independent voltage monitoring channels: VS33 and VS5 sense 3.3 V and 5 V rails for undervoltage detection (2.2 V / 3.5 V thresholds) and overvoltage detection (3.9 V / 6.1 V thresholds); VDD monitors 12 V via internal scaling. All OVP/UVP comparators include 73-µs noise deglitching and latch-on-fault behavior.

Its control logic features a 38-ms PSON input debounce, 75-ms UVP enable delay after PSON assertion, and a fixed 150-ms PGI-to-PGO delay - distinct from the 300-ms delay of the TPS3510 variant. The FPO output remains latched high until PSON toggles low→high, while PGO asserts high only when all monitored rails are valid and stable.

Key Specifications

Pinout & Package

TPS3511D is housed in an 8-pin SOIC (D) package with 1.27 mm pitch, 3.9 mm width, and 1.75 mm max height - compatible with standard surface-mount assembly and IPC-7351 land patterns.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply supervision applications.

Compared with TPS3511DR, the TPS3511D offers identical functionality in tube packaging for flexibility in low-volume use; compared with TPS3510DR, it provides tighter timing control and extended temperature capability essential for industrial and server-grade power systems.

Availability

TPS3511D is available at Aetrix Electronics and suitable for ATX power supply supervision, industrial DC-DC monitoring, server PSU redundancy control, and embedded power sequencing requiring stable component supply and long-term lifecycle support.

Supply support for TPS3511D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of heritage in power-supply control ICs.

The TPS351x family was designed specifically for PC and industrial switching power supplies to integrate OVP, UVP, PGO timing, and fault latching - replacing multi-component discrete supervision circuits with a single, qualified IC.

FAQ

What is the power-good delay time of the TPS3511D?

The TPS3511D provides a fixed 150-ms delay from PGI input stabilization to PGO output assertion. This value is confirmed in the SLVS312A datasheet's timing diagram and electrical characteristics table, distinguishing it from the 300-ms delay of the TPS3510 variant. The 150-ms delay ensures compliance with ATX specification timing windows while enabling faster system boot in temperature-critical applications. TPS3511D uses this delay regardless of supply voltage or temperature within its operating range.

Does the TPS3511D support 12 V overvoltage protection?

Yes, the TPS3511D monitors 12 V overvoltage through the VDD pin, with a typical threshold of 13.8 V (range 13.2 V to 14.4 V). This is explicitly documented in the "Overvoltage Protection" section and electrical characteristics table of the SLVS312A datasheet. Unlike VS33 and VS5, which are dedicated inputs, VDD serves dual purpose: powering the IC and sensing the 12 V rail via internal scaling - eliminating need for external resistive dividers. TPS3511D asserts FPO and deasserts PGO upon detection.

How does the TPS3511D handle undervoltage detection on the 3.3 V rail?

The TPS3511D monitors the 3.3 V rail at the VS33 pin with a typical undervoltage threshold of 2.2 V (range 2.0 V to 2.4 V), as specified in the SLVS312A datasheet. Detection requires the voltage to remain below threshold for ≥146 µs (noise-deglitched), after which FPO latches high and PGO pulls low. The UVP function is enabled 75 ms after PSON goes low, preventing false trips during power-up inrush. TPS3511D maintains this behavior across its full –40°C to 125°C operating range.

What is the maximum sink current capability of the TPS3511D's PGO output?

The TPS3511D's PGO output can sink up to 10 mA while maintaining a low-level voltage ≤0.4 V (at VDD = 4 V), per the "Electrical Characteristics" table in SLVS312A. This rating enables direct connection to standard 4.7-kΩ pull-up resistors on 5 V or 3.3 V buses. Exceeding 10 mA risks violating VOL spec and may cause unreliable PGO deassertion during fault conditions. TPS3511D's FPO output supports higher 20-mA sink capability for driving heavier loads like MOSFET gates.

Is the TPS3511D pin-compatible with the TPS3510 series?

Yes, the TPS3511D is pin-compatible with the TPS3510D and TPS3510DR in the same SOIC-8 (D) package - all share identical pin numbering, functions, and electrical interface. However, key differences exist: TPS3511D has 150-ms PGO delay (vs. 300 ms), wider temperature range (–40°C to 125°C vs. –40°C to 85°C), and different part marking (PS3511). TPS3511D cannot be substituted without verifying timing and thermal requirements in the target application.