Texas Instruments TPS3511DR
- Part No.:
- TPS3511DR
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS3511DR.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,536
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Product details
Overview
TPS3511DR from Texas Instruments is a dedicated power-supply supervisor IC for PC ATX and industrial switching power supplies, providing overvoltage (12 V/5 V/3.3 V), undervoltage (5 V/3.3 V), fault latching, open-drain PGO/FPO outputs, and 150-ms power-good delay. It operates from 4 V to 15 V supply and supports –40°C to 125°C ambient temperature.
For engineers reviewing the TPS3511DR datasheet, TPS3511DR pinout, TPS3511DR application, or TPS3511DR equivalent, key selection considerations include its 150-ms PGI-to-PGO delay (vs. 300 ms in TPS3510), 75-ms short-circuit turnon protection, 73-µs OVP noise immunity, 2.3-ms PSON-to-FPO turnoff delay, and SOIC-8 package compatibility with legacy motherboard designs.
Technical Context
The TPS3511DR integrates independent comparators for 12 V (via VDD), 5 V (VS5), and 3.3 V (VS33) overvoltage detection with 73-µs deglitching, plus dual undervoltage thresholds (PGI1 = 1.15 V, PGI2 = 0.95 V) and separate 3.3 V/5 V UV monitoring. Its internal latch holds FPO high on fault until PSON toggles low→high.
It implements three critical timing functions: 150-ms power-good assertion delay after valid PGI/VS5/VS33 rise, 75-ms UV enable delay post-PSON low, and 38-ms PSON input debounce - all with fixed internal RC timing, no external components required.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Power-good delay | 150 ms - ensures stable 3.3 V/5 V rails before asserting PGO high; distinct from TPS3510's 300 ms |
| OVP threshold (VS5) | 5.7–6.5 V - detects >12% overvoltage on 5 V rail; prevents logic damage during transient surges |
| UVP threshold (VS33) | 2.0–2.4 V - triggers fault if 3.3 V drops below 72% nominal; protects downstream CMOS/TTL |
| Noise deglitch time | 73 µs - rejects sub-73 µs spikes on OVP inputs; avoids false trips from switching noise |
| PSON debounce time | 24–57 ms - filters mechanical or EMI-induced glitches on motherboard PSON control line |
| Operating temperature | –40°C to +125°C - qualified for extended industrial environments beyond standard PC range |
| FPO sink current | 20 mA - drives standard pull-up resistors to 5 V/12 V; enables direct interface with PSU enable circuitry |
Pinout & Package
TPS3511DR uses an 8-pin SOIC (D) package with 1.27 mm pitch, 3.91 mm width, and 1.75 mm max height - compatible with JEDEC MS-012AA footprint and standard ATX motherboard layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGI (Pin 1) | Power-good input | Monitors motherboard PGI signal; asserts PGO only when PGI > 1.15 V and VS5/VS33 are valid |
| GND (Pin 2) | Ground reference | Common return for all analog comparators and digital logic; must be low-impedance PCB connection |
| FPO (Pin 3) | Fault protection output | Open-drain latch output; pulled high by PSU to disable main rails when fault occurs |
| PSON (Pin 4) | Power supply ON/OFF control | Active-low signal; toggling low→high resets FPO latch and re-enables PSU after fault |
| VS33 (Pin 5) | 3.3 V monitoring input | Dedicated sense pin for 3.3 V rail OVP/UVP; threshold set internally at 3.9 V / 2.2 V |
| VS5 (Pin 6) | 5 V monitoring input | Dedicated sense pin for 5 V rail OVP/UVP; threshold set internally at 6.1 V / 3.5 V |
| VDD (Pin 7) | Supply voltage / 12 V OVP input | Accepts 4–15 V supply; also senses 12 V rail via same pin using internal 13.8 V OVP comparator |
| PGO (Pin 8) | Power-good output | Open-drain output; pulled high by motherboard to indicate 3.3 V/5 V rails are within spec |
Key Features
| Feature | Design Value |
|---|---|
| Triple-rail OVP monitoring | Simultaneously supervises 12 V (via VDD), 5 V (VS5), and 3.3 V (VS33) without external dividers |
| Configurable PGO delay | Fixed 150-ms delay (TPS3511) vs. 300-ms (TPS3510); enables faster system boot in time-critical applications |
| Short-circuit turnon protection | 75-ms UV enable delay after PSON low prevents false trip during initial power-up into shorted load |
| Robust noise immunity | 73-µs deglitch on all OVP inputs eliminates false triggering from SMPS switching noise |
| Latched fault response | FPO remains high until explicit PSON low→high reset - ensures PSU stays disabled until operator intervention |
Applications
| ATX Power Supply Supervision | Industrial 3.3 V/5 V Rail Monitoring |
|---|---|
Use Scenario: Motherboard-level supervision of ATX-compliant power supply outputs during cold start, brownout, and overvoltage events. IC Role / Device Role / Timing Role: Central supervisor coordinating PGO assertion, FPO latching, and PSON-controlled reset across 3.3 V, 5 V, and 12 V rails. Use Value: Eliminates need for discrete comparators and timers; reduces BOM count by ≥7 components while meeting Intel ATX12V timing requirements. | Use Scenario: Monitoring dual regulated outputs in programmable logic controllers where 3.3 V powers FPGA I/O and 5 V powers analog front-end circuitry. IC Role / Device Role / Timing Role: Independent UV/OV detector with 150-ms PGO delay and –40°C to 125°C operation for harsh factory-floor environments. Use Value: Guarantees safe processor reset before FPGA configuration begins; prevents partial initialization due to marginal rail voltages. |
| Server PSU Fault Management | Embedded Computing Power Sequencing |
Use Scenario: Fault containment in redundant server PSUs where immediate shutdown on 12 V OVP is required to protect backplane interconnects. IC Role / Device Role / Timing Role: Fast 73-µs OVP detection on VDD (12 V) with latched FPO output driving PSU enable/disable logic. Use Value: Limits fault energy to <100 mJ before shutdown - prevents arcing damage in hot-swap connectors and PCIe slots. | Use Scenario: Coordinating power-up sequence between auxiliary 5 V standby and main 3.3 V domain in network edge gateways. IC Role / Device Role / Timing Role: Uses PGI input to synchronize PGO assertion with external PMIC sequencing signals. Use Value: Enables deterministic boot order without custom firmware delays; reduces boot time variance from ±120 ms to ±15 ms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-supply supervision applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3510DR | 300-ms PGI-to-PGO delay; rated for –40°C to 85°C only; identical pinout and function otherwise | Suitable for commercial PC motherboards where extended temperature range not required | Select TPS3510DR only if 300-ms delay aligns with legacy BIOS timing and operating temperature stays ≤85°C |
| TPS3823-33DBVR | Single 3.3 V supervisor; no 5 V/12 V OVP; 200-ms delay; SOT-23-5 package; lower quiescent current (12 µA) | Targeted at space-constrained embedded systems with single-rail monitoring needs | Choose TPS3823-33DBVR only for 3.3 V-only applications where SOIC-8 footprint and multi-rail protection are unnecessary |
Compared with TPS3510DR, TPS3511DR offers faster system boot via 150-ms PGO delay and wider temperature support, while TPS3823-33DBVR trades multi-rail capability for ultra-small size and microamp quiescent current - making each suitable for distinct architecture tiers.
Availability
TPS3511DR is available at Aetrix Electronics and suitable for ATX power supply supervision, industrial PLC rail monitoring, server PSU fault management, and embedded computing power sequencing requiring stable component supply across extended temperature ranges.
Supply support for TPS3511DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and power management technologies.
The TPS351x family was designed specifically for PC ATX and industrial switching power supply supervision, integrating OVP, UVP, PGO timing, and fault latching into a single SOIC-8 device to replace discrete protection circuits.
FAQ
What is the power-good delay specification for the TPS3511DR?
The TPS3511DR provides a fixed 150-ms delay from valid PGI/VS5/VS33 input conditions to assertion of the open-drain PGO output. This is confirmed in the SLVS312A datasheet Section 3 (Functional Block Diagram footnote †) and Electrical Characteristics table (td1 parameter). The TPS3511DR variant is explicitly defined with this 150-ms value, distinguishing it from the 300-ms delay of the TPS3510DR.
Does the TPS3511DR support 12 V overvoltage protection?
Yes, the TPS3511DR monitors 12 V overvoltage via the VDD pin, with a specified threshold of 13.2–14.4 V (typical 13.8 V). This is documented in the "Overvoltage Protection" section and Electrical Characteristics table under "Overvoltage threshold VDD". No external resistor divider is needed, as the internal comparator references VDD directly for 12 V OVP detection.
How does the TPS3511DR handle short-circuit conditions during power-on?
The TPS3511DR implements a 75-ms delay before enabling undervoltage protection after PSON goes low, preventing false trips when the power supply turns on into a shorted output. This behavior is described in the "Short-Circuit Power Supply Turnon" section and verified in the Electrical Characteristics table under "Short-circuit protection delay" (49–114 ms range, typical 75 ms).
What is the maximum operating temperature rating for the TPS3511DR?
TPS3511DR is characterized for operation from –40°C to +125°C, as stated in the "Recommended Operating Conditions" table (TA = –40 to 125°C) and confirmed in the Package Option Addendum where TPS3511DR lists "Op temp (°C): –40 to 125". This exceeds the –40°C to 85°C rating of the TPS3510DR variant.
Can the TPS3511DR replace the TPS3510DR in an existing design?
The TPS3511DR is pin-compatible and functionally identical to the TPS3510DR except for its 150-ms PGO delay (vs. 300 ms) and extended temperature range (–40°C to 125°C vs. –40°C to 85°C). Electrical characteristics, pinout, and timing parameters (except td1) match exactly. Therefore, TPS3511DR can be used as a drop-in replacement where faster boot timing and higher temperature operation are acceptable or required.
TPS3511DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 3.3V, 5V, 12V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 100ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TPS3511DR FAQ
1.How can I place an order for TPS3511DR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3511DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3511DR reliable?
The price and inventory of TPS3511DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3511DR is usually 5 days.
3.What payment methods are accepted for TPS3511DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3511DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS3511DR?
TPS3511DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS3511DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3511DR?
For technical support, including TPS3511DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3511DR requirements.
6.How does Aetrix verify that TPS3511DR is sourced from the original manufacturer or authorized distributors?
All TPS3511DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3511DR meets industry standards.
7.What is the process for return or replacement of TPS3511DR?
All TPS3511DR units undergo pre-shipment inspection (PSI). If there is an issue with TPS3511DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3511DR part is unused and in its original packaging.
Return procedure for TPS3511DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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