Texas Instruments TPS3511P

Overview

TPS3511P from Texas Instruments is a dedicated power-supply supervisor IC for PC ATX and industrial switching power supplies, providing overvoltage (12 V/5 V/3.3 V), undervoltage (5 V/3.3 V), fault latching, open-drain PGO/FPO outputs, and 150-ms power-good delay. It operates from 4 V to 15 V supply and supports –40°C to 85°C ambient.

For engineers reviewing the TPS3511P datasheet, TPS3511P pinout, TPS3511P application, or TPS3511P equivalent, key selection considerations include its 150-ms PGI-to-PGO delay, 75-ms short-circuit turnon protection, 73-µs OVP noise deglitching, and PDIP-8 package compatibility with legacy motherboard designs requiring through-hole mounting and thermal robustness.

Technical Context

The TPS3511P integrates independent comparators with precision bandgap references (0.95 V and 1.15 V) for UV/OV detection on VS33, VS5, and VDD pins. Its internal state machine latches fault conditions until PSON toggles low-to-high, enabling reliable reset recovery in ATX systems.

It implements three distinct timing blocks: 150-ms PGI-to-PGO delay (vs. 300 ms for TPS3510), 75-ms UVP enable delay after PSON assertion, and 2.3-ms PSON-to-FPO turnoff delay with 38-ms input debounce - all critical for safe power sequencing and surge immunity in 5 V/3.3 V rail monitoring.

Key Specifications

Pinout & Package

TPS3511P uses an 8-pin PDIP (Plastic Dual In-line Package) with 0.3-inch body width and through-hole mounting. Pin 1 is marked by a notch or dot; leads are tin-lead (NIPDAU) finish, RoHS-compliant, and rated for manual soldering up to 260°C.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply supervision applications.

Compared with TPS3510P, TPS3511P reduces boot latency by 150 ms while maintaining identical fault response and packaging; TLV809E lacks essential features including PSON interface, multi-rail monitoring, and latched FPO-making it unsuitable as a direct alternative.

Availability

TPS3511P is available at Aetrix Electronics and suitable for ATX power supply manufacturing, industrial SMPS design, legacy motherboard refurbishment, embedded computing power sequencing, and DIN-rail power system development requiring stable component supply across extended product lifecycles.

Supply support for TPS3511P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of heritage in power integrity solutions.

The TPS351x family was designed specifically for PC ATX and industrial switching power supply supervision-integrating OV/UVP, PGO timing, and fault latching into a single PDIP/SOIC package to replace discrete protection circuits.

FAQ

What is the exact power-good delay of the TPS3511P, and how does it differ from the TPS3510P?

The TPS3511P has a guaranteed PGI-to-PGO delay of 100–225 ms, with typical value 150 ms. This is half the delay of the TPS3510P (300-ms typical), enabling faster system boot in ATX power supplies where rail stabilization occurs more quickly. Both share identical pinout, package, and threshold specifications-only the internal timer differs.

Can the TPS3511P monitor 12 V without external components, and how is that implemented?

Yes, the TPS3511P monitors 12 V overvoltage directly through its VDD pin, eliminating need for external resistor dividers. When VDD rises above 13.2–14.4 V (typ. 13.8 V), the internal 12 V OVP comparator triggers fault latching. This dual-role pin simplifies design and improves accuracy versus scaled-down sensing methods.

Does the TPS3511P support both 3.3 V and 5 V undervoltage protection simultaneously, and what are the thresholds?

Yes, the TPS3511P independently monitors VS33 and VS5 for undervoltage. VS33 UVP threshold is 2.0–2.4 V (typ. 2.2 V); VS5 UVP threshold is 3.3–3.7 V (typ. 3.5 V). Both require >146 µs violation to assert fault, with 75-ms enable delay after PSON assertion to prevent false triggering during turnon.

How does the TPS3511P handle noise on its voltage monitoring inputs, and what is the deglitching specification?

The TPS3511P applies 73-µs deglitching to all overvoltage detection paths (VS33, VS5, VDD) and 146-µs deglitching to undervoltage paths. This rejects sub-100 µs transients-such as switching noise or ESD-induced spikes-without affecting response to sustained faults, ensuring robust operation in electrically noisy power supply environments.

Is the TPS3511P pin-compatible with other members of the TPS351x family, and which packages are available?

Yes, the TPS3511P is pin-compatible with TPS3510P in the PDIP-8 package (8-pin through-hole). The SOIC-8 variants (e.g., TPS3511DR) share identical pinout but differ in package type and thermal performance. All TPS351x devices use the same terminal functions and electrical interface-only delay timing and temperature grade vary between part numbers.