Texas Instruments TPS3513N

Overview

TPS3513N from Texas Instruments is a PC power supply supervisor IC designed for ATX/ATX12V-compliant systems. It provides coordinated overvoltage (OVP), undervoltage (UVP), and overcurrent (OCP) protection across 12 V, 5 V, and 3.3 V rails, with open-drain PGO and FPO outputs, 300-ms power-good delay, and –40°C to 85°C operation.

For engineers reviewing the TPS3513N datasheet, TPS3513N pinout, TPS3513N application, or TPS3513N equivalent, this device serves as a dedicated fault-monitoring and sequencing controller in desktop/server SMPS designs - requiring precise rail monitoring, latchable fault signaling, and PSON-controlled reset timing.

Technical Context

The TPS3513N integrates three independent OVP/UVP comparators (VS12, VS5, VS33), three OCP current-sense inputs (IS12, IS5, IS33), and a programmable reference current source (RI pin) enabling accurate trip-point setting via external resistor. Its fault logic latches on OVP/OCP/UVP events and requires PSON toggling to reset.

It features dual open-drain outputs: PGO (power-good, active-low, 300-ms delay after valid PGI/VS5/VS33), and FPO (fault-protection, latched high on fault). The 38-ms PSON debounce and 2.3-ms PSON-to-FPO turnoff delay prevent false triggering during control-line transients.

Key Specifications

Pinout & Package

TPS3513N is housed in a 14-pin plastic DIP (PDIP-N) package, 13.97 mm × 5.08 mm × 4.57 mm, through-hole mountable, RoHS-compliant, with no internal connection on Pin 7 (NC).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PC power supply supervision applications.

Compared with TPS3513N, TPS3511N omits 5 V/3.3 V monitoring and PGI interface, limiting system-level coordination; UCC3917N lacks OCP programmability and fault latching, reducing robustness in high-availability designs.

Availability

TPS3513N is available at Aetrix Electronics and suitable for desktop PC power supplies, server ATX12V modules, and industrial embedded power systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant through-hole packaging.

Supply support for TPS3513N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in power integrity solutions.

The TPS3513N belongs to TI's PC power supply supervisor product line, engineered specifically for ATX/ATX12V-compliant switching power supplies requiring synchronized multi-rail fault detection, programmable OCP, and robust sequencing control.

FAQ

What is the primary function of the TPS3513N in a PC power supply?

The TPS3513N serves as a dedicated power-supply supervisor IC that monitors 12 V, 5 V, and 3.3 V output rails for overvoltage, undervoltage, and overcurrent conditions. It generates a timed power-good signal (PGO) and a latched fault-protection output (FPO), enabling safe, coordinated startup and shutdown in ATX-compliant systems. The TPS3513N integrates all necessary comparators, timing blocks, and open-drain drivers to replace multiple discrete components.

How does the TPS3513N implement overcurrent protection across different voltage rails?

The TPS3513N implements overcurrent protection using three dedicated current-sense inputs (IS12, IS5, IS33) and a programmable reference current source tied to the RI pin. An external resistor between RI and GND sets I_ref (12.5–62.5 µA), which scales the trip threshold based on sense-resistor voltage drop. Each rail's OCP comparator triggers within 73 µs of exceeding its threshold, asserting FPO high and latching the fault until PSON is toggled.

What timing parameters define the TPS3513N's power-good behavior?

The TPS3513N asserts PGO high 300 ms (typical) after PGI, VS5, and VS33 all exceed their respective undervoltage thresholds. If any monitored input falls below threshold, PGO deasserts immediately. Additionally, the TPS3513N enforces a 38-ms debounce window on PSON transitions and a 2.3-ms delay from PSON low-to-high to FPO deassertion, ensuring glitch immunity and controlled sequencing.

Can the TPS3513N be used in systems without a PGI signal?

Yes - the TPS3513N can operate without an external PGI signal. In such configurations, PGI is typically pulled to a valid logic high (>1.2 V) or tied to VS5. The TPS3513N will then rely solely on VS5 and VS33 for power-good qualification, still applying the 300-ms delay before asserting PGO. However, omitting PGI removes system-level coordination with the motherboard's power state.

What package type and mounting method does the TPS3513N use?

The TPS3513N is packaged in a 14-pin plastic dual in-line package (PDIP-N), designed for through-hole mounting. Its dimensions are 13.97 mm × 5.08 mm × 4.57 mm, with 2.54 mm pin pitch and RoHS-compliant NiPdAu lead finish. This package supports manual assembly, wave soldering, and legacy PCB layouts requiring axial-component compatibility.