Texas Instruments TPS3514D

Overview

TPS3514D from Texas Instruments is a PC switching power-supply supervisor IC with integrated over-voltage (OV), under-voltage (UV), and over-current (OC) protection for 12V, 5V, and 3.3V rails, open-drain PGO and FPO outputs, and 300ms power-good delay - used in ATX power supplies to ensure safe system startup and fault isolation.

For engineers reviewing the TPS3514D datasheet, TPS3514D pinout, TPS3514D application, or TPS3514D equivalent, key selection criteria include UVLO thresholds (4.45V on / 3.65V off), programmable OCP via RI pin (12.5–62.5µA reference), 38ms PSON debounce, and SOIC-14 package compatibility with legacy PC PSU designs.

Technical Context

The TPS3514D implements three independent voltage-monitor comparators (VS12, VS5, VS33) with 150–225µs noise deglitching and separate 73µs OVP/OCP glitch rejection; UVLO is tied to VDD with hysteresis, while PGI monitoring enables external power-good synchronization.

OCP uses an external resistor at RI to set I(REF), which scales three current-sense comparators (IS12/IS5/IS33) with fixed 8× gain; all OCP circuitry is powered from VS12, drawing <1mA, enabling precise trip-point tuning (e.g., 9.2A on 12V rail with 56kΩ RI and 0.01Ω sense resistor).

Key Specifications

Pinout & Package

TPS3514D is housed in a 14-pin SOIC (SO-14) package per JEDEC MS-012AB, 3.9mm body width, 1.75mm max height, with gull-wing leads and RoHS-compliant NiPdAu finish (MSL Level-1).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PC power-supply supervisor applications.

Compared with TPS3513D, TPS3514D adds full 12V rail supervision and programmable OCP - essential for modern ATX compliance; versus UC3903N, it delivers factory-trimmed thresholds, integrated timing, and SOIC packaging - reducing design risk and component count.

Availability

TPS3514D is available at Aetrix Electronics and suitable for ATX power supplies, industrial multi-rail PSUs, embedded system power sequencing, and legacy motherboard upgrades requiring stable component supply and long-term lifecycle support.

Supply support for TPS3514D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in power-supply IC design and manufacturing.

The TPS3514D belongs to TI's PC Power-Supply Supervisor family, engineered specifically to replace discrete protection circuits in ATX-compliant switching power supplies with integrated, pin-compatible supervision for 12V/5V/3.3V rails.

FAQ

What is the function of the RI pin on the TPS3514D?

The RI pin on the TPS3514D sets the reference current (I(REF)) for over-current protection by connecting an external resistor to GND. With I(REF) programmable from 12.5µA to 62.5µA, it directly determines trip points for all three monitored rails (12V, 5V, 3.3V) using the formula I(OCP_TRIP) = I(REF) × 8 × R(SENSE)/R(ISx). This enables precise, adjustable current limiting without trimming resistors or calibration firmware - a core capability of the TPS3514D.

Does the TPS3514D support ATX power-good timing requirements?

Yes, the TPS3514D fully supports ATX power-good timing: it asserts the open-drain PGO output high after a guaranteed 300ms delay once PGI, VS5, and VS33 meet their respective thresholds. The delay is internally generated and temperature-stable, eliminating external timing components. This behavior is explicitly validated in the datasheet's timing diagrams and functional table, making the TPS3514D compliant with ATX 2.0–3.x specifications - a defining feature of the TPS3514D.

How does the TPS3514D handle fault latching and reset?

The TPS3514D latches the FPO output high upon detection of any OV, UV, or OC fault and holds it until the PSON input transitions from low to high. This reset action clears the fault latch and re-enables normal monitoring after a 75ms OCP enable delay. The 38ms PSON debounce prevents spurious resets from noise. Unlike non-latching supervisors, this behavior ensures faults remain visible to system controllers - a critical safety mechanism implemented in the TPS3514D.

Can the TPS3514D monitor only two rails instead of all three?

Yes, the TPS3514D allows selective rail monitoring: unused voltage inputs (e.g., VS12, VS5, or VS33) may be left unconnected or tied to valid supply voltages without affecting operation of the others. Similarly, IS12/IS5/IS33 can be individually enabled or disabled by connecting or floating their respective sense resistors. This flexibility lets designers tailor supervision to actual PSU topology - for example, using only VS5/VS33 and IS5/IS33 in 5V/3.3V-only systems - while retaining full functionality of the TPS3514D.

What is the maximum sink current capability of the TPS3514D's PGO output?

The TPS3514D's PGO output is an open-drain driver rated for up to 10mA sink current at VDD ≥ 4.5V, with a low-level output voltage (VOL) of ≤0.4V under that condition. This allows direct interface with standard TTL/CMOS logic inputs or pull-up to 3.3V/5V without external buffering. The FPO output supports higher sink capability (20mA), but PGO's 10mA rating is sufficient for driving typical motherboard PWR_OK inputs - a key electrical specification confirmed in the TPS3514D's Electrical Characteristics table.