Texas Instruments TPS3702CX18DDCT

Overview

TPS3702CX18DDCT from Texas Instruments is a high-accuracy window voltage detector IC designed for precision overvoltage and undervoltage monitoring of low-voltage rails (1V–5V nominal). It features ±0.25% typical threshold accuracy, 0.55% internal hysteresis, open-drain UV/OV outputs, and operates from 2V to 18V supply. Used in FPGA power sequencing, DSP supply supervision, and industrial control systems where tight voltage tolerance and glitch immunity are critical.

For engineers reviewing the TPS3702CX18DDCT datasheet, TPS3702CX18DDCT pinout, TPS3702CX18DDCT application, or TPS3702CX18DDCT equivalent, this page delivers verified functional role, validated SOT-6 package mapping, confirmed 6-pin terminal functions, real-world timing behavior (35 µs LH propagation), and accurate alternative part comparisons - all grounded in TI's SBVS251A production datasheet.

Technical Context

The TPS3702CX18DDCT integrates two precision comparators with an internal trimmed resistor divider and reference, eliminating external resistors and enabling fixed ±4% or ±9% nominal window thresholds (selected via SET pin logic level). Its dual open-drain outputs (UV, OV) operate independently and support pull-up voltages up to 18V - decoupled from VDD.

It implements internal glitch immunity and noise filtering, with startup delay (tSD) of 300 µs and propagation delays of 19 µs (HL) / 35 µs (LH) under defined overdrive conditions. Threshold hysteresis (0.55% or 1.0%) prevents chatter during rail transitions within the valid window.

Key Specifications

Pinout & Package

SOT-6 (DDC) package, 2.90 mm × 1.60 mm body size, surface-mount, thermally enhanced for industrial ambient operation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar window voltage detector applications.

Compared with TPS3702CX18DDCT, TPS3700DDCR omits overvoltage detection and configurability, reducing system-level fault coverage; MAX6816EUT+T trades accuracy, temperature range, and flexibility for lower unit cost - making TPS3702CX18DDCT the only choice for safety-critical, wide-supply, dual-threshold applications.

Availability

TPS3702CX18DDCT is available at Aetrix Electronics and suitable for FPGA power sequencing, DSP-based motor control, and industrial PLC I/O modules requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for TPS3702CX18DDCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity technologies with emphasis on reliability, precision, and industrial-grade qualification.

The TPS3702 family is engineered for high-accuracy power supply monitoring in safety-critical and high-reliability systems - targeting FPGA, ASIC, DSP, and industrial control applications where narrow voltage margins and glitch immunity are mandatory.

FAQ

What is the function of the SET pin on the TPS3702CX18DDCT?

The SET pin on the TPS3702CX18DDCT selects between two nominal window thresholds: logic-low (≤250 mV) configures ±9%, and logic-high (≥750 mV) configures ±4%. This enables runtime adaptation - e.g., loose band during power-up to avoid false trips, then tight band during steady-state operation. The TPS3702CX18DDCT uses internal comparator offsets and reference trimming to maintain ±0.9% total accuracy across temperature regardless of SET state.

Can the TPS3702CX18DDCT monitor a 1.2V rail while powered from a 12V supply?

Yes. The TPS3702CX18DDCT supports independent VDD (2–18V) and SENSE (0–6.5V) domains. When VDD = 12V and SENSE = 1.2V, the device accurately detects deviations outside ±4.9% (worst-case) using its internal resistor divider and precision reference. No level-shifting or external attenuation is needed - the TPS3702CX18DDCT is explicitly designed for this decoupled architecture per TI SBVS251A Section 7.1.2.

What is the maximum pull-up voltage allowed on the UV and OV pins of the TPS3702CX18DDCT?

The UV and OV pins of the TPS3702CX18DDCT support pull-up voltages up to 18V, independent of VDD. This allows interfacing with higher-voltage logic domains (e.g., 5V or 12V reset lines) while VDD is supplied from a lower rail like 3.3V. The outputs sink up to 10 mA and exhibit VOL ≤250 mV at IOUT = 5 mA (VDD = 5V), ensuring clean logic-low assertion across the full 18V range - a key specification confirmed in TPS3702CX18DDCT Electrical Characteristics Table 5.5.

Does the TPS3702CX18DDCT require external capacitors for stable operation?

Yes. A 0.1 µF ceramic capacitor is required between VDD and GND, placed as close as possible to the TPS3702CX18DDCT pins per TI layout guidelines (Section 9.1). While the SENSE pin does not mandate a capacitor, a 1 nF–10 nF bypass is recommended for noisy environments to reduce transient sensitivity. These requirements are specified in the TPS3702CX18DDCT datasheet Section 4 (Pin Functions) and Section 9 (Layout), and omission risks erratic UV/OV assertion due to supply bounce or EMI coupling.

How does the TPS3702CX18DDCT handle power supply brownouts below its UVLO threshold?

When VDD drops below the UVLO threshold (1.3V–1.7V), the TPS3702CX18DDCT forces UV low and places OV in high-impedance state - providing a known fail-safe output condition during brownout. Below the POR voltage (0.8V), both outputs become undefined. This behavior is defined in Section 6.4.2–6.4.3 of the TPS3702CX18DDCT datasheet and ensures deterministic reset signaling even as main supply collapses, a critical feature for industrial systems requiring controlled shutdown.