Texas Instruments TPS3703A5120DSER
- Part No.:
- TPS3703A5120DSER
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 6-WFDFN
- Datasheet:
-
TPS3703A5120DSER.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6WSON
- Quantity:
- Payment:

- Shipping:

Inventory:1,806
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Product details
Overview
TPS3703A5120DSER from Texas Instruments is a high-accuracy window voltage supervisor IC designed for overvoltage (OV) and undervoltage (UV) monitoring of low-voltage rails in safety-critical systems. It features ±0.25% typical threshold accuracy, 7 µA maximum quiescent current, fixed 1.2 V UV and 1.5 V OV thresholds with ±5% window tolerance, and a factory-configured 10 ms reset time delay (CT pin open). It operates across 1.7 V to 5.5 V supply range and is used in industrial motor drives and data center power sequencing.
For engineers reviewing the TPS3703A5120DSER datasheet, TPS3703A5120DSER pinout, TPS3703A5120DSER application, or TPS3703A5120DSER equivalent, key selection considerations include its integrated resistor-divider architecture eliminating external components, open-drain active-low RESET output with latch mode, manual reset (MR) support, and WSON-6 package compatibility with space-constrained PCB layouts.
Technical Context
The TPS3703A5120DSER implements dual precision comparators with an internal trimmed resistor divider and reference, enabling simultaneous OV and UV detection without external resistors. Its CT pin supports three timing modes: fixed 10 ms delay (CT floating), fixed 200 ms delay (CT tied to VDD), or programmable delay via external capacitor.
It uses internal hysteresis (0.3–0.8% of threshold) and glitch immunity (3.5 µs for SENSE, 25 ns for MR) to reject noise-induced false resets. The SENSE and VDD pins are separated to support redundant monitoring architectures required in industrial and grid infrastructure applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Range | 1.7 V to 5.5 V - supports wide-input rail monitoring including 1.8 V, 2.5 V, 3.3 V, and 5 V systems |
| UV/OV Thresholds | 1.2 V UV / 1.5 V OV with ±5% window tolerance - matches common core voltage margins for MCU and FPGA power rails |
| Threshold Accuracy | ±0.25% (typical), ±0.7% (–40°C to +125°C) - enables tight margin supervision without derating for resistor drift |
| Quiescent Current | 7 µA (max) - ensures minimal impact on battery-backed or ultra-low-power standby states |
| Reset Delay | 10 ms (CT open) - factory-set fixed delay eliminates timing component selection and layout uncertainty |
| Output Type | Open-drain active-low RESET with latching - allows wired-OR configuration and direct interface to processor reset inputs |
| Hysteresis | 0.3–0.8% of threshold - prevents oscillation during slow-ramping or noisy supply transitions |
Pinout & Package
TPS3703A5120DSER is housed in a 1.50 mm × 1.50 mm WSON-6 (DSE) package with wettable flanks, optimized for automated optical inspection (AOI) and high-density routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SENSE | Monitor input | Direct connection point for the voltage rail under supervision; supports redundancy when decoupled from VDD |
| 2: VDD | Power supply input | Independent bias rail - must be ≥1.7 V and stable for >300 µs startup delay before valid RESET assertion |
| 3: CT | Capacitor time control | Selects between fixed 10 ms (open) or 200 ms (tied to VDD) delays, or enables programmable delay with external capacitor |
| 4: RESET | Active-low open-drain output | Latched low during OV/UV fault or MR assertion; requires external pull-up to logic-compatible voltage rail |
| 5: GND | Ground reference | Common return path for internal comparators, reference, and output stage; must be low-impedance |
| 6: MR | Manual reset input | Pulled high internally; driven low (≤0.3 V) to force immediate RESET assertion independent of SENSE state |
Key Features
| Feature | Design Value |
|---|---|
| Integrated resistor-divider architecture | Eliminates external threshold-setting resistors, reducing BOM count, layout area, and accuracy degradation from resistor tolerance and tempco |
| Factory-programmed 10 ms reset delay | Guarantees consistent power-on sequencing timing without capacitor selection, placement, or parasitic sensitivity |
| Separate SENSE and VDD pins | Enables true dual-rail monitoring (e.g., VDD = 3.3 V, SENSE = 1.2 V core) and meets functional safety requirements for redundancy |
| RESET latching output mode | Maintains asserted state until both SENSE returns to valid window and reset delay expires - prevents premature release during recovery |
| High noise immunity | 3.5 µs glitch rejection on SENSE and 25 ns on MR ensure robust operation in electrically noisy environments like motor drives and factory automation |
Applications
| Motor Drive Power Sequencing | Industrial PLC I/O Module Supervision |
|---|---|
|
Use Scenario: Monitoring gate driver supply (12 V DC-DC output) and MCU core rail (1.2 V) during startup and fault conditions. IC Role / Device Role / Timing Role: Dual-rail window supervisor asserting RESET to halt PWM generation and isolate power stages upon OV/UV event. Use Value: Prevents shoot-through and latch-up by enforcing strict voltage validity before enabling control logic - enabled by ±0.7% accuracy and separate SENSE/VDD pins. |
Use Scenario: Supervising isolated 5 V and 24 V rails powering analog input circuits and digital backplane in modular PLC chassis. IC Role / Device Role / Timing Role: Independent OV/UV detector per rail with latched RESET output to trigger system-level watchdog timeout and safe shutdown. Use Value: Ensures deterministic fail-safe behavior under brownout or transient overvoltage - supported by 7 µA IQ and 10 ms fixed delay for predictable recovery timing. |
| Data Center Server VRM Monitoring | Grid-Tie Inverter Control Board |
|
Use Scenario: Validating 3.3 V auxiliary and 1.8 V FPGA configuration rails in server motherboard power management subsystem. IC Role / Device Role / Timing Role: High-accuracy window monitor interfacing directly to BMC reset input via open-drain wired-OR topology. Use Value: Enables tighter voltage margining (±4%) vs legacy supervisors - made possible by ±0.25% typical threshold accuracy and no external resistor error sources. |
Use Scenario: Detecting DC-link overvoltage (>450 V) and control rail undervoltage (<10 V) in solar inverter gate driver stage. IC Role / Device Role / Timing Role: Isolated supervision node using optocoupler-fed SENSE signal and MR-triggered emergency shutdown coordination. Use Value: Guarantees fast, reliable fault response (3.5 µs glitch immunity) in high-noise EMI environments - critical for IEC 61000-4-4 compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3703A5125DSER | Same package and accuracy, but ±7% window tolerance and 5 ms fixed delay (CT open) | Better suited for less stringent margin applications where faster reset recovery is prioritized | Select when design tolerates wider threshold spread and requires shorter fault hold-off time |
| TLV809E25DBVR | Single-channel UV supervisor only; 2.5 V fixed threshold; ±1.5% accuracy; 140 ms delay; SOT-23-3 | Lacks OV detection, window functionality, and manual reset - limited to basic power-on reset use cases | Choose only for cost-sensitive, single-threshold applications where OV protection is handled elsewhere |
Compared with TPS3703A5120DSER, the A5125 variant trades tighter timing for relaxed tolerance, while TLV809E25DBVR sacrifices window supervision and MR capability for lower cost and smaller footprint - neither offers the same combination of dual-threshold accuracy, latched output, and flexible timing.
Availability
TPS3703A5120DSER is available at Aetrix Electronics and suitable for motor drive power sequencing, industrial PLC I/O supervision, and data center server VRM monitoring requiring stable component supply and long-term lifecycle assurance.
Supply support for TPS3703A5120DSER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with deep expertise in precision analog, power management, and industrial interface technologies.
The TPS3703 product line was developed specifically for high-reliability, low-voltage window supervision in industrial automation, grid infrastructure, and enterprise computing - emphasizing accuracy, noise immunity, and integration to reduce system-level design risk.
FAQ
What is the exact overvoltage and undervoltage threshold configuration for TPS3703A5120DSER?
The TPS3703A5120DSER is configured with a fixed 1.2 V undervoltage (UV) threshold and 1.5 V overvoltage (OV) threshold, implementing a ±5% window tolerance. These values are factory-trimmed and do not require external resistors. The device's nomenclature "A5120" confirms the 1.2 V UV / 1.5 V OV pairing with 5% tolerance - verified in TI's SBVS249B datasheet Table 12-1 and Section 5 Device Comparison.
Does TPS3703A5120DSER support manual reset, and how is it implemented?
Yes, TPS3703A5120DSER supports manual reset via the MR pin (Pin 6). Driving MR below 0.3 V (VMR_L) asserts the RESET output low immediately, regardless of SENSE voltage. After MR is released, RESET remains low for the full reset delay (10 ms) before deasserting - provided SENSE is within the valid window. The MR pin has an internal 100 kΩ pull-up, so it may be left floating if unused.
What is the reset time delay behavior of TPS3703A5120DSER, and how is it set?
The TPS3703A5120DSER has a factory-programmed 10 ms reset delay when the CT pin (Pin 3) is left unconnected (open). This is its default timing mode. Connecting CT to VDD selects a 200 ms delay, while adding an external capacitor from CT to GND enables user-programmable delay - all without changing the TPS3703A5120DSER part number or PCB layout.
Can TPS3703A5120DSER monitor a different voltage than its own supply rail?
Yes. TPS3703A5120DSER separates the SENSE and VDD pins, allowing independent monitoring. For example, VDD can be powered from a 3.3 V auxiliary rail while SENSE monitors a 1.2 V core voltage. This separation supports redundancy requirements in safety-critical systems and avoids coupling supply noise into the monitored signal path.
What package type and thermal characteristics does TPS3703A5120DSER use?
TPS3703A5120DSER uses the WSON-6 (DSE) package: 1.50 mm × 1.50 mm body size with wettable flanks. Its junction-to-ambient thermal resistance (RθJA) is 184.2°C/W, and it operates across –40°C to +125°C ambient temperature. The small footprint and thermal performance make it suitable for compact, high-density industrial PCBs with constrained airflow.
TPS3703A5120DSER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 1.2V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TPS3703A5120DSER FAQ
1.How can I place an order for TPS3703A5120DSER through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3703A5120DSER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3703A5120DSER reliable?
The price and inventory of TPS3703A5120DSER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3703A5120DSER is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3703A5120DSER?
For technical support, including TPS3703A5120DSER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3703A5120DSER requirements.
6.How does Aetrix verify that TPS3703A5120DSER is sourced from the original manufacturer or authorized distributors?
All TPS3703A5120DSER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3703A5120DSER meets industry standards.
7.What is the process for return or replacement of TPS3703A5120DSER?
All TPS3703A5120DSER units undergo pre-shipment inspection (PSI). If there is an issue with TPS3703A5120DSER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3703A5120DSER part is unused and in its original packaging.
Return procedure for TPS3703A5120DSER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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