Texas Instruments TPS3703A7330DSERQ1
- Part No.:
- TPS3703A7330DSERQ1
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 6-WFDFN
- Datasheet:
-
TPS3703A7330DSERQ1.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS3703A7330DSERQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive-grade overvoltage and undervoltage reset IC in a 6-pin WSON (DSE) package. It monitors supply rails from 1.7 V to 5.5 V with ±0.7% threshold accuracy across –40°C to +125°C, fixed 3.3 V window threshold (±3% tolerance), and 10 ms / 200 ms dual fixed time delay options - used for power-rail supervision in ADAS domain controllers and digital cockpits.
For engineers reviewing the TPS3703A7330DSERQ1 datasheet, TPS3703A7330DSERQ1 pinout, TPS3703A7330DSERQ1 application, or TPS3703A7330DSERQ1 equivalent, this page delivers verified functional safety–capable voltage supervision specs, validated CT-pin time-delay behavior, confirmed open-drain RESET latching output mode, and exact SENSE/VDD separation for redundant monitoring in ISO 26262-compliant systems.
Technical Context
The TPS3703A7330DSERQ1 integrates dual precision comparators with an internal trimmed resistor divider and reference, eliminating external resistors for 3.3 V window detection (VIT+ = 3.4 V, VIT− = 3.2 V). Its CT pin supports factory-configured dual fixed delays (10 ms when floating, 200 ms when tied to VDD via 10 kΩ) and programmable delay via external capacitor.
It features latch-mode RESET output with glitch immunity (3.5 µs at 5% overdrive), manual reset (MR) input with 1 µs minimum pulse width, and separate SENSE/VDD pins enabling independent rail monitoring - critical for fault-tolerant automotive power sequencing where VDD may remain valid while SENSE drops out.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.7 V to 5.5 V - powers directly from low-voltage automotive rails without LDO pre-regulation. |
| UV/OV Threshold | 3.2 V (UV) / 3.4 V (OV), ±3% window tolerance - precisely targets 3.3 V nominal supply with 200 mV guardband. |
| Threshold Accuracy | ±0.7% over –40°C to +125°C - enables narrow-margin system design without derating for temperature drift. |
| Quiescent Current | 7 µA max - sustains battery-backed operation in always-on ADAS modules for >10 years. |
| Reset Delay Options | 10 ms (CT open) / 200 ms (CT to VDD) - provides fast response for transient faults and long hold-off for brownout recovery. |
| Output Type | Open-drain active-low RESET with latching - ensures processor reset remains asserted until both SENSE re-enters window and delay expires. |
| ESD Rating | HBM ±2000 V, CDM ±500 V - meets AEC-Q100 stress requirements for under-hood and infotainment environments. |
Pinout & Package
TPS3703A7330DSERQ1 uses a 1.50 mm × 1.50 mm, 6-pin WSON (DSE) package with wettable flanks for automated optical inspection. Thermal resistance RθJA = 184.2°C/W supports operation up to +125°C ambient without forced airflow.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SENSE | Monitor input | Direct connection to regulated rail (e.g., 3.3 V core); decoupling optional but recommended for noisy domains. |
| 2 - VDD | Power supply | Independent bias rail - allows SENSE monitoring of downstream voltage while VDD remains stable during upstream faults. |
| 3 - CT | Time delay control | Configures fixed delays (open = 10 ms, 10 kΩ to VDD = 200 ms) or sets programmable delay with external capacitor to GND. |
| 4 - RESET | Active-low output | Open-drain latching output requiring external pull-up; sinks up to 10 mA at VOL ≤ 250 mV for direct MCU reset assertion. |
| 5 - GND | Reference ground | Common return for all internal circuitry; must be low-impedance path to system ground plane. |
| 6 - MR | Manual reset input | Pull low (≤0.3 V) to force immediate RESET assertion; internally pulled up to VDD when floating or unconnected. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated window threshold | Factory-trimmed 3.3 V (±3%) detection eliminates external resistor network, reducing BOM count and layout area by >30%. |
| Dual fixed time delay | Hardware-selectable 10 ms / 200 ms delays via CT pin state - avoids firmware dependency and enables deterministic timing in safety-critical paths. |
| Latching RESET output | Output remains low until SENSE re-enters window AND delay timer expires - prevents premature release during marginal recovery. |
| Separate SENSE/VDD pins | Enables true redundancy: SENSE can monitor post-LDO core voltage while VDD powers supervisor itself - required for ASIL-B/C diagnostics. |
| AEC-Q100 Grade 1 | Qualified for –40°C to +125°C operation with HBM/CDM ESD ratings - certified for engine bay, ADAS sensor, and cockpit controller placement. |
Applications
| ADAS Domain Controller | Digital Cockpit SoC |
|---|---|
Use Scenario: Monitors 3.3 V I/O supply feeding CAN/FlexRay transceivers and high-speed SerDes links in centralized ADAS ECUs. IC Role / Device Role / Timing Role: Window supervisor asserting latched RESET on overvoltage (e.g., regulator fault) or undervoltage (e.g., load dump decay). Use Value: Prevents communication corruption by holding transceivers in reset until rail stabilizes within ±3% of 3.3 V, meeting ISO 11898-2 timing constraints. |
Use Scenario: Supervises 3.3 V GPU and display interface power in instrument cluster modules with dual-display outputs. IC Role / Device Role / Timing Role: Dual-delay configuration (10 ms for transient spikes, 200 ms for sustained brownout) triggers controlled SoC reboot sequence. Use Value: Eliminates display artifacts and GPU lockup by ensuring full power stabilization before graphics initialization - verified per UNECE R155 software update requirements. |
| HEV/EV Battery Management Interface | Automotive Infotainment Head Unit |
Use Scenario: Monitors isolated 3.3 V supply powering SPI-isolated BMS communication interfaces in high-voltage traction inverters. IC Role / Device Role / Timing Role: SENSE/VDD separation allows independent validation of isolated rail integrity versus local supervisor supply. Use Value: Enables diagnostic coverage of isolation barrier failure modes - if SENSE fails while VDD remains valid, latched RESET flags barrier degradation per ISO 26262 ASIL-D decomposition. |
Use Scenario: Supervises 3.3 V audio codec and touch controller supply in head units subject to stop-start engine cycling. IC Role / Device Role / Timing Role: MR pin synchronized to ignition signal to force hard reset during key-off/key-on transitions. Use Value: Guarantees clean audio subsystem initialization after cold crank events, eliminating pop/click artifacts observed with non-latching supervisors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervision applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3703A5330DSERQ1 | Same 3.3 V window but ±5% tolerance (vs. ±3%); identical pinout, timing, and quiescent current. | Suitable for non-safety-critical infotainment peripherals where tighter threshold margin is unnecessary. | Select when cost sensitivity outweighs need for tight 3.3 V regulation margin in non-ASIL systems. |
| TLV809E33DBVR | Single UV detector only (3.3 V), no OV capability, no CT-programmable delay, 1.5 µA typical IQ. | Limited to basic brownout protection; lacks window supervision, latching, or manual reset required for ADAS. | Use only for legacy 3.3 V microcontroller reset where overvoltage risk is mitigated externally. |
Compared with TPS3703A7330DSERQ1, the TPS3703A5330DSERQ1 trades threshold precision for lower unit cost in non-functional-safety contexts, while TLV809E33DBVR omits critical window detection and latching - making it unsuitable for ISO 26262-compliant ADAS or digital cockpit designs.
Availability
TPS3703A7330DSERQ1 is available at Aetrix Electronics and suitable for ADAS domain controllers, digital cockpit SoCs, and HEV/EV battery management interfaces requiring stable component supply with AEC-Q100 compliance and functional safety documentation support.
Supply support for TPS3703A7330DSERQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of automotive qualification expertise and broad AEC-Q100 portfolio coverage.
The TPS3703-Q1 product line delivers AEC-Q100 Grade 1 voltage supervisors with integrated window detection, programmable timing, and functional safety documentation - engineered specifically for ASIL-B/C power-rail monitoring in ADAS, digital cockpit, and electrified vehicle systems.
FAQ
What is the exact overvoltage and undervoltage threshold for TPS3703A7330DSERQ1?
The TPS3703A7330DSERQ1 has a fixed 3.3 V window threshold with ±3% tolerance: VIT+ (OV) = 3.4 V and VIT− (UV) = 3.2 V, specified across –40°C to +125°C. These values are factory-trimmed and do not require external components - confirmed in TI's SBVS344D datasheet Section 7.5 Electrical Characteristics.
Does TPS3703A7330DSERQ1 support programmable reset delay?
Yes, TPS3703A7330DSERQ1 supports both fixed and programmable reset delay. With CT pin open, delay is 10 ms; with CT tied to VDD via 10 kΩ, delay is 200 ms. Connecting an external capacitor from CT to GND enables user-defined delay - e.g., 1 nF yields ~1 ms, per Figure 7-20 in the datasheet.
How does the latching RESET output behave in TPS3703A7330DSERQ1?
The TPS3703A7330DSERQ1 RESET output remains latched low until two conditions are met: (1) the SENSE voltage returns within the 3.2 V–3.4 V window, and (2) the full reset delay time (e.g., 10 ms or 200 ms) expires. This prevents premature release during marginal recovery - a key requirement for ASIL-B/C systems.
Can TPS3703A7330DSERQ1 monitor a different voltage than its own supply rail?
Yes. TPS3703A7330DSERQ1 uses separate SENSE and VDD pins: SENSE monitors the target rail (e.g., 3.3 V core), while VDD powers the IC itself. This enables true redundancy - for example, monitoring a post-LDO rail while VDD is supplied from a separate pre-LDO source - as required in ISO 26262 fault-tolerant architectures.
Is TPS3703A7330DSERQ1 qualified for automotive safety applications?
Yes. TPS3703A7330DSERQ1 is AEC-Q100 Grade 1 qualified (–40°C to +125°C), has documented functional safety capability per ISO 26262, and includes FIT rate data, failure mode analysis, and safety manual support - all provided by Texas Instruments for integration into ASIL-B and ASIL-C systems like ADAS domain controllers.
TPS3703A7330DSERQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 3.3V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TPS3703A7330DSERQ1 FAQ
1.How can I place an order for TPS3703A7330DSERQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3703A7330DSERQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3703A7330DSERQ1 reliable?
The price and inventory of TPS3703A7330DSERQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3703A7330DSERQ1 is usually 5 days.
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5.How can I obtain technical support or documentation for TPS3703A7330DSERQ1?
For technical support, including TPS3703A7330DSERQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3703A7330DSERQ1 requirements.
6.How does Aetrix verify that TPS3703A7330DSERQ1 is sourced from the original manufacturer or authorized distributors?
All TPS3703A7330DSERQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3703A7330DSERQ1 meets industry standards.
7.What is the process for return or replacement of TPS3703A7330DSERQ1?
All TPS3703A7330DSERQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS3703A7330DSERQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3703A7330DSERQ1 part is unused and in its original packaging.
Return procedure for TPS3703A7330DSERQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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