Texas Instruments TPS3703B3080DSERQ1
- Part No.:
- TPS3703B3080DSERQ1
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 6-WFDFN
- Datasheet:
-
TPS3703B3080DSERQ1.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS3703B3080DSERQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive-grade overvoltage/undervoltage reset IC in a 6-pin WSON (DSE) package, featuring ±0.7% threshold accuracy across –40°C to +125°C, 7 µA max quiescent current, and dual fixed time delay options (1 ms / 20 ms) selected via CT pin configuration. It monitors critical supply rails in ADAS domain controllers and digital cockpits.
For engineers reviewing the TPS3703B3080DSERQ1 datasheet, TPS3703B3080DSERQ1 pinout, TPS3703B3080DSERQ1 application, or TPS3703B3080DSERQ1 equivalent, this page delivers verified functional safety–capable voltage supervision parameters, exact pin roles for SENSE/VDD/CT/RESET/MR/GND, automotive thermal and ESD ratings, and validated alternative parts with documented threshold and timing differences.
Technical Context
The TPS3703B3080DSERQ1 integrates two precision comparators with internal trimmed resistor dividers and a stable voltage reference to implement windowed OV/UV detection without external resistors. Its architecture supports latched RESET output and glitch-immune operation with 3.5 µs immunity on both VIT+ and VIT− thresholds.
Time delay selection is implemented via CT pin state: floating CT selects 1 ms delay, while CT tied to VDD (via 10 kΩ) selects 20 ms delay - both factory-programmed and mutually exclusive. The device asserts active-low open-drain RESET when SENSE violates either the 0.80 V UV threshold or 3.0 V OV threshold, with ±3% window tolerance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| OV/UV Thresholds | 3.0 V (OV), 0.80 V (UV); fixed window with ±3% tolerance - enables precise rail monitoring for 3.3 V systems |
| Threshold Accuracy | ±0.7% over –40°C to +125°C - eliminates need for external calibration in automotive environments |
| Quiescent Current | 7 µA max - supports always-on monitoring in low-power ADAS subsystems |
| Reset Time Delay | 1 ms (CT floating) or 20 ms (CT = VDD) - factory-set, no capacitor required for basic timing |
| Supply Range | 1.7 V to 5.5 V - compatible with 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| Output Type | Open-drain active-low RESET - supports wired-OR with other supervisors and flexible pull-up voltage selection |
| AEC-Q100 Grade | Grade 1 (–40°C to +125°C TA) - qualified for under-hood and cockpit applications |
Pinout & Package
Package: WSON-6 (DSE), 1.50 mm × 1.50 mm, 0.5 mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SENSE | Monitor input | Direct connection point for supply rail; internally compared against 0.80 V UV and 3.0 V OV thresholds |
| 2 - VDD | Power supply input | Bias source for internal circuitry; must exceed 1.7 V for UVLO release and remain ≥ VPOR (1 V) for valid reset state |
| 3 - CT | Time delay control | Selects fixed delay mode: floating = 1 ms, pulled to VDD = 20 ms; also supports programmable delay with external capacitor |
| 4 - RESET | Active-low output | Open-drain signal asserted low during OV/UV fault or MR activation; requires external pull-up to system logic voltage |
| 5 - GND | Ground reference | Primary return path for internal comparators and reference; must be low-impedance for noise immunity |
| 6 - MR | Manual reset input | Logic-low pulse (≤0.3 V) forces immediate RESET assertion; internally pulled up to VDD when unused |
Key Features
| Feature | Design Value |
|---|---|
| Integrated resistor divider | Eliminates external components for threshold setting - improves accuracy, reduces BOM count, and avoids resistor tolerance stacking |
| Latched RESET output | Maintains asserted state until SENSE returns within window and delay expires - prevents spurious recovery during marginal conditions |
| Internal glitch immunity | 3.5 µs minimum rejection on SENSE transitions - suppresses noise-induced false resets without external RC filtering |
| Functional safety documentation | Available FIT data, failure modes, and diagnostic coverage reports - supports ISO 26262 ASIL-B system integration |
| Dual independent thresholds | Simultaneous OV and UV detection with separate hysteresis bands - enables true window supervision for safety-critical rails |
Applications
| ADAS Domain Controller Power Supervision | Digital Cockpit SoC Reset Management |
|---|---|
Use Scenario: Monitors 3.3 V core supply of radar fusion processor in autonomous driving ECU. IC Role / Device Role / Timing Role: Window supervisor asserting RESET if supply drifts below 0.80 V or above 3.0 V; 20 ms delay ensures stable power-up sequencing. Use Value: Prevents processor lockup during transient load dumps or cold-crank events by enforcing strict voltage compliance before boot. |
Use Scenario: Controls reset timing for infotainment SoC with multiple voltage domains (1.8 V, 3.3 V, 5 V). IC Role / Device Role / Timing Role: Dual-threshold detection on main 3.3 V rail; 1 ms delay used for fast fault response during runtime brownouts. Use Value: Enables deterministic recovery from undervoltage events without requiring firmware intervention or external timers. |
| HEV/EV Battery Management Interface | Automotive Infotainment Display Power Sequencing |
Use Scenario: Supervises isolated 5 V supply powering CAN FD transceivers and isolation gate drivers in battery pack controller. IC Role / Device Role / Timing Role: Configured as UV-only monitor at 0.80 V threshold; CT pin floating for 1 ms delay to meet ASIL-D diagnostic timing requirements. Use Value: Guarantees fail-safe shutdown of communication interfaces when auxiliary supply collapses, preventing bus corruption. |
Use Scenario: Coordinates power-up sequence between display driver IC and backlight LED controller in cluster module. IC Role / Device Role / Timing Role: Uses MR pin to synchronize RESET assertion with MCU-controlled enable signals; latched output holds display in reset until full rail stabilization. Use Value: Eliminates visual artifacts (flicker, ghosting) caused by out-of-sequence power delivery to display subsystems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar overvoltage/undervoltage supervision applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3703A3080DSERQ1 | Same 0.80 V UV / 3.0 V OV thresholds, but fixed 10 ms / 200 ms delay options instead of 1 ms / 20 ms | Suitable for slower power-up sequences where longer delay prevents premature release | Select when system startup timing requires >10 ms reset hold time after rail stabilization |
| TLV809E33DBVRQ1 | Single UV detector only (3.3 V threshold), no OV capability, no CT-programmable delay, SOT-23-3 package | Lower cost for basic undervoltage-only use cases; lacks window supervision and automotive thermal margin | Choose only for non-safety-critical 3.3 V rails where OV detection is unnecessary and board space permits larger footprint |
Compared with TPS3703A3080DSERQ1, the TPS3703B3080DSERQ1 offers faster fault response (1 ms vs 10 ms), enabling tighter timing control in high-speed ADAS processors; versus TLV809E33DBVRQ1, it provides full window supervision, AEC-Q100 Grade 1 qualification, and integrated MR functionality - essential for ASIL-B compliant systems.
Availability
TPS3703B3080DSERQ1 is available at Aetrix Electronics and suitable for advanced driver assistance systems (ADAS), digital cockpit electronics, and HEV/EV battery management interfaces requiring stable component supply, long-term automotive lifecycle support, and traceable sourcing.
Supply support for TPS3703B3080DSERQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with deep expertise in automotive-grade reliability, functional safety, and high-precision analog design.
The TPS3703-Q1 product line was designed specifically for automotive safety-critical voltage supervision - integrating windowed OV/UV detection, latch-mode RESET, and AEC-Q100 Grade 1 operation into the industry's smallest 6-pin WSON package.
FAQ
What is the exact overvoltage and undervoltage threshold for TPS3703B3080DSERQ1?
The TPS3703B3080DSERQ1 has a fixed 3.0 V overvoltage (VIT+) threshold and a fixed 0.80 V undervoltage (VIT−) threshold, with ±3% window tolerance. These values are laser-trimmed at wafer test and specified across –40°C to +125°C ambient temperature. The part number suffix '3080' directly encodes these thresholds: '30' = 3.0 V OV, '80' = 0.80 V UV.
How does the CT pin configure the reset time delay on TPS3703B3080DSERQ1?
On the TPS3703B3080DSERQ1, the CT pin selects between two factory-programmed delays: floating CT configures 1 ms delay, while connecting CT to VDD (via 10 kΩ) configures 20 ms delay. This behavior is defined by the 'B' variant in the nomenclature and does not require an external capacitor for basic operation - though a capacitor can be added for user-programmable timing outside these two fixed points.
Is TPS3703B3080DSERQ1 qualified for automotive safety applications?
Yes, the TPS3703B3080DSERQ1 is AEC-Q100 Grade 1 qualified (–40°C to +125°C TA), HBM ESD level 2 (±2 kV), CDM level C7B (±500 V), and designated functional safety–capable. TI provides FMEDA reports, safety manuals, and diagnostic coverage analysis to support ISO 26262 ASIL-B system development - all documented for the TPS3703B3080DSERQ1 specifically.
What is the role of the MR pin on TPS3703B3080DSERQ1, and how is it used?
The MR (Manual Reset) pin on TPS3703B3080DSERQ1 allows external logic to force a reset: pulling MR below 0.3 V (VMR_L) immediately asserts the open-drain RESET output low. After MR is released, RESET remains low for the full configured delay (1 ms or 20 ms) before deasserting - provided SENSE is within the 0.80 V–3.0 V window. When unused, MR may be left floating due to its internal 100 kΩ pull-up to VDD.
Does TPS3703B3080DSERQ1 require external resistors to set its voltage thresholds?
No, the TPS3703B3080DSERQ1 does not require external resistors. Its 0.80 V UV and 3.0 V OV thresholds are set by internal laser-trimmed resistor dividers and a precision voltage reference. This eliminates component count, removes external resistor tolerance errors, and ensures ±0.7% accuracy over temperature - a key differentiator from discrete resistor-based supervisors like the TLV809 series.
TPS3703B3080DSERQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 0.8V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TPS3703B3080DSERQ1 FAQ
1.How can I place an order for TPS3703B3080DSERQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3703B3080DSERQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3703B3080DSERQ1 reliable?
The price and inventory of TPS3703B3080DSERQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3703B3080DSERQ1 is usually 5 days.
3.What payment methods are accepted for TPS3703B3080DSERQ1?
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TPS3703B3080DSERQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS3703B3080DSERQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3703B3080DSERQ1?
For technical support, including TPS3703B3080DSERQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3703B3080DSERQ1 requirements.
6.How does Aetrix verify that TPS3703B3080DSERQ1 is sourced from the original manufacturer or authorized distributors?
All TPS3703B3080DSERQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3703B3080DSERQ1 meets industry standards.
7.What is the process for return or replacement of TPS3703B3080DSERQ1?
All TPS3703B3080DSERQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS3703B3080DSERQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3703B3080DSERQ1 part is unused and in its original packaging.
Return procedure for TPS3703B3080DSERQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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