Texas Instruments TPS3703F6050DSER
- Part No.:
- TPS3703F6050DSER
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 6-WFDFN
- Datasheet:
-
TPS3703F6050DSER.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6WSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS3703F6050DSER from Texas Instruments is a high-accuracy window voltage supervisor IC with integrated overvoltage (OV) and undervoltage (UV) detection, ±0.7% threshold accuracy over –40°C to +125°C, 7 µA max quiescent current, and dual fixed/programmable reset time delay (1 ms / 20 ms). It monitors low-voltage rails in industrial processors and power management systems where narrow supply margins demand precise fault detection.
For engineers reviewing the TPS3703F6050DSER datasheet, TPS3703F6050DSER pinout, TPS3703F6050DSER application, or TPS3703F6050DSER equivalent, key selection criteria include its 6-pin WSON package, UV/OV window thresholds of 0.6 V (UV) and 0.5 V (OV), CT-pin programmable timing, open-drain RESET output, and manual reset (MR) support for system sequencing.
Technical Context
The TPS3703F6050DSER implements dual precision comparators with an internal trimmed resistor divider and reference, eliminating external resistors and enabling ±0.7% total threshold accuracy across temperature. Its architecture supports independent OV and UV trip points with built-in hysteresis (0.3–0.8% of threshold) and glitch immunity (≥3.5 µs at 5% overdrive).
Reset timing is determined by the CT pin configuration: floating CT selects 1 ms delay, CT pulled to VDD via 10 kΩ selects 20 ms delay, and CT connected to ground via capacitor enables user-programmable delays from ~50 µs to >2 s. The MR input provides asynchronous reset assertion with 1 µs minimum pulse width and 500 ns propagation delay.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.7 V to 5.5 V - supports direct connection to core logic rails including 1.8 V, 2.5 V, 3.3 V, and 5 V domains. |
| UV/OV Thresholds | 0.6 V (UV), 0.5 V (OV) - fixed window configuration with ±0.7% accuracy over –40°C to +125°C ensures reliable detection in tight-margin systems. |
| Quiescent Current | 7 µA (max) - enables always-on monitoring in battery-backed or energy-sensitive industrial control applications. |
| Reset Time Delay | 1 ms (CT open), 20 ms (CT = VDD) - factory-trimmed dual fixed delays eliminate external timing components and reduce BOM count. |
| Output Type | Open-drain active-low RESET - supports wired-OR configurations, level-shifting via external pull-up, and interface with 1.2–5.5 V logic families. |
| Manual Reset Input | MR pin with 100 kΩ internal pull-up - allows processor-initiated reset without external circuitry; asserts RESET within 500 ns of MR low. |
| Hysteresis | 0.3–0.8% of threshold - prevents false triggering near trip points during noisy or slowly ramping supply conditions. |
Pinout & Package
TPS3703F6050DSER is housed in a 1.50 mm × 1.50 mm, 6-pin WSON (DSE) package with wettable flanks, optimized for space-constrained industrial PCB layouts and automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SENSE | Monitor input | Direct connection point for the voltage rail under supervision; internally referenced to precision bandgap - no external resistors required. |
| 2 - VDD | Power supply | Input for 1.7–5.5 V operation; powers internal comparators, reference, and logic - decoupling with 0.1 µF ceramic recommended. |
| 3 - CT | Timing control | Selects reset delay mode: floating = 1 ms, pulled to VDD = 20 ms, capacitor-to-GND = programmable delay (e.g., 1 nF ≈ 1.5 ms). |
| 4 - RESET | Output signal | Active-low open-drain output; sinks up to 40 mA - requires external pull-up to define logic-high level and interface voltage. |
| 5 - GND | Reference node | Analog and digital ground return; must be low-impedance and co-located with VDD decoupling for noise immunity. |
| 6 - MR | Control input | Asynchronous manual reset trigger; driven low (<0.3 V) to force RESET assertion - internally pulled up to VDD (100 kΩ). |
Key Features
| Feature | Design Value |
|---|---|
| No external resistor network | Internal precision resistor divider eliminates component count, layout area, and tolerance-induced error in threshold setting. |
| Dual fixed + programmable timing | CT pin supports both factory-set delays (1 ms / 20 ms) and capacitor-based adjustment - simplifies design while retaining flexibility. |
| High noise immunity | 3.5 µs glitch rejection on SENSE and 25 ns on MR - prevents spurious resets from EMI, switching noise, or transient coupling. |
| Redundant sensing path | Separate SENSE and VDD pins enable independent monitoring of supply and load rails - critical for functional safety architectures. |
| Latching RESET output | Output remains asserted until monitored voltage returns within window and delay expires - ensures clean processor boot sequencing. |
Applications
| Motor Drives | Factory Automation |
|---|---|
|
Use Scenario: Monitoring gate driver supply rails in servo inverters to prevent shoot-through during undervoltage events. IC Role / Device Role / Timing Role: Window supervisor asserting RESET to disable PWM controllers when DC bus drops below 48 V or spikes above 52 V. Use Value: Prevents MOSFET failure by enforcing strict 4% window margin around nominal 50 V rail with ±0.7% accuracy and 1 ms response. |
Use Scenario: Supervising PLC I/O module power supplies exposed to industrial transients and brownouts. IC Role / Device Role / Timing Role: Dual-threshold detector latching RESET during UV/OV faults and holding until stable recovery with 20 ms delay. Use Value: Eliminates need for external RC timing networks and improves long-term reliability in harsh 85°C ambient environments. |
| Grid Infrastructure | Data Center Computing |
|
Use Scenario: Protecting smart meter microcontrollers from AC/DC converter output fluctuations during line surges. IC Role / Device Role / Timing Role: High-accuracy OV/UV monitor interfacing with ARM Cortex-M4 reset pin via 10 kΩ pull-up to 3.3 V. Use Value: Achieves 0.6 V UV / 0.5 V OV trip with <1 mV drift over 10-year field life - meets IEC 62053-21 accuracy requirements. |
Use Scenario: Ensuring clean boot of FPGA-based accelerators by validating auxiliary 1.2 V core rail before configuration. IC Role / Device Role / Timing Role: Low-quiescent-current (7 µA) supervisor providing fail-safe reset with 1 ms delay and MR-controlled reinitialization. Use Value: Reduces standby power by >90% versus discrete comparator solutions while maintaining ±0.7% threshold stability across temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3703F6050QDSER | Automotive-grade (AEC-Q100 Grade 1), same electrical specs but qualified for –40°C to +125°C junction with enhanced ESD (±2.5 kV HBM). | Required for automotive ADAS ECUs; not necessary for industrial control where commercial temp grade suffices. | Choose TPS3703F6050QDSER only if AEC-Q100 compliance is mandated; otherwise TPS3703F6050DSER offers identical performance at lower cost. |
| TLV809E25DBVR | Single-channel UV detector only; 2.5 V fixed threshold; ±1.5% accuracy; no OV detection or CT-programmable delay. | Suitable for basic POR in microcontrollers but cannot replace window supervision or programmable timing needs. | Use TLV809E25DBVR only for simple undervoltage-only use cases; TPS3703F6050DSER is required when OV detection, tight accuracy, or dual delay modes are needed. |
Compared with TPS3703F6050QDSER, the TPS3703F6050DSER omits automotive qualification but retains identical electrical behavior and timing - making it optimal for cost-sensitive industrial designs. Versus TLV809E25DBVR, it adds overvoltage protection, ±0.7% accuracy, and flexible timing - essential for robust system-level supervision.
Availability
TPS3703F6050DSER is available at Aetrix Electronics and suitable for motor drives, factory automation, and grid infrastructure requiring stable component supply with guaranteed long-term sourcing and full traceability.
Supply support for TPS3703F6050DSER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in industrial and automotive electronics.
The TPS3703 product line delivers high-accuracy, low-power voltage supervision for systems demanding precise OV/UV fault detection - designed specifically for industrial control, motor drives, and infrastructure equipment operating under wide temperature and noise conditions.
FAQ
What is the exact UV and OV threshold configuration for TPS3703F6050DSER?
The TPS3703F6050DSER is configured as a fixed window supervisor with undervoltage threshold (VIT−) of 0.6 V and overvoltage threshold (VIT+) of 0.5 V - meaning it asserts RESET when the SENSE voltage falls below 0.6 V OR rises above 0.5 V. This asymmetric window is confirmed in TI's device nomenclature guide and Electrical Characteristics table for the F6050 variant.
How does the CT pin determine reset delay in TPS3703F6050DSER?
In TPS3703F6050DSER, the CT pin selects between two factory-programmed delays: floating CT configures 1 ms delay, while connecting CT to VDD via 10 kΩ resistor configures 20 ms delay. No external capacitor is required for these modes. Capacitor-based programming is supported but not default - the "F" suffix denotes fixed-delay variants.
Does TPS3703F6050DSER require external resistors to set thresholds?
No. The TPS3703F6050DSER integrates precision trimmed resistors and a bandgap reference, so no external resistors are needed to configure its 0.6 V UV / 0.5 V OV thresholds. This eliminates resistor tolerance errors, reduces PCB area, and improves long-term accuracy stability - a key differentiator versus discrete supervisor solutions.
What is the maximum operating temperature range for TPS3703F6050DSER?
The TPS3703F6050DSER is rated for operation from –40°C to +125°C ambient temperature, with guaranteed ±0.7% threshold accuracy across this full range. Its thermal resistance (RθJA = 184.2°C/W) and low 7 µA max quiescent current ensure reliable performance in sealed enclosures and high-density industrial modules.
Can TPS3703F6050DSER monitor a supply rail different from its own VDD?
Yes. TPS3703F6050DSER supports independent supply monitoring: VDD powers the IC (1.7–5.5 V), while SENSE monitors a separate rail (0–5.5 V). This enables monitoring of higher-voltage rails (e.g., 12 V DC bus) using a resistive divider into SENSE, or low-noise core rails directly - a capability confirmed in the Functional Block Diagram and Pin Functions section.
TPS3703F6050DSER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 0.5V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TPS3703F6050DSER FAQ
1.How can I place an order for TPS3703F6050DSER through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3703F6050DSER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3703F6050DSER reliable?
The price and inventory of TPS3703F6050DSER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3703F6050DSER is usually 5 days.
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Once your TPS3703F6050DSER order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3703F6050DSER?
For technical support, including TPS3703F6050DSER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3703F6050DSER requirements.
6.How does Aetrix verify that TPS3703F6050DSER is sourced from the original manufacturer or authorized distributors?
All TPS3703F6050DSER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3703F6050DSER meets industry standards.
7.What is the process for return or replacement of TPS3703F6050DSER?
All TPS3703F6050DSER units undergo pre-shipment inspection (PSI). If there is an issue with TPS3703F6050DSER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3703F6050DSER part is unused and in its original packaging.
Return procedure for TPS3703F6050DSER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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