Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Texas Instruments TPS3707-50DR

Name: TPS3707-50DR
Brand: Texas Instruments
SKU: TPS3707-50DR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: TPS3707-50DR

Manufacturer:: Texas Instruments

Category:: Supervisors

Package:: 8-SOIC (0.154", 3.90mm Width)

Datasheet:: TPS3707-50DR.pdf

Description:: IC SUPERVISOR 1 CHANNEL 8SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:2,313

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

TPS3707-50DR from Texas Instruments is a precision 5 V supply-voltage supervisor IC with active-low and active-high complementary reset outputs, fixed 200 ms power-on reset delay, power-fail comparator (PFI/PFO), and manual reset input (MR). It operates from 2 V to 6 V supply, draws ≤50 µA quiescent current, and supports industrial temperature range (–40°C to 85°C) in SOIC-8 package. Used for reliable reset assertion in microcontroller-based systems during brownout or startup.

For engineers reviewing the TPS3707-50DR datasheet, TPS3707-50DR pinout, TPS3707-50DR application, or TPS3707-50DR equivalent, key selection criteria include its dual-reset output architecture, 4.55 V negative-going threshold (V_IT–), PFI comparator input for auxiliary rail monitoring, MR-driven reset timing, and compatibility with legacy MAX705–MAX708 designs.

Technical Context

The TPS3707-50DR implements a precision bandgap reference (1.25 V) and dual comparators: one monitors V_DD against a fixed 4.55 V threshold (±2.5% over temperature), the other compares PFI voltage against 1.25 V. Its reset logic asserts RESET (active-low) and RESET (active-high) simultaneously on V_DD undervoltage or MR assertion, with propagation delays under 5 µs and hysteresis of 70 mV on V_DD.

Unlike the TPS3705-xx series, the TPS3707-xx family omits watchdog timer circuitry (no WDI/WDO pins) and instead provides complementary reset outputs - enabling direct interface with processors requiring either polarity without external inverters. The device requires no external capacitor for reset timing and supports immediate reset release upon V_DD recovery above V_IT+.

Key Specifications

Parameter	Value and Actual Design Meaning
V_IT– Threshold	4.45 V to 4.65 V (–40°C to 85°C); precise 5 V supply supervision with 70 mV hysteresis prevents chatter during brownout recovery
Reset Delay	200 ms fixed delay after V_DD exceeds V_IT+; eliminates need for external RC timing network
Supply Current	20 µA to 50 µA (2 V–6 V); enables low-power battery-backed systems and energy-sensitive applications
Operating Temp	–40°C to +85°C; validated for industrial control, programmable logic, and automotive body electronics
Output Types	Active-low RESET and active-high RESET; eliminates external inverter for mixed-signaling processor interfaces
PFI Input Range	0 V to V_DD, with 1.2 V to 1.3 V trip point; supports monitoring of secondary rails (e.g., 12 V via resistor divider)
Propagation Delay	<5 µs (V_DD→RESET); ensures rapid response to supply collapse without firmware intervention

Pinout & Package

TPS3707-50DR is available in 8-pin SOIC (D) package (3.90 mm × 4.90 mm), with exposed pad not electrically connected. Pin functions are validated per TI SLVS184F Rev F (October 2020).

Pin/Terminal	Circuit Role	Design Meaning
1 MR	Manual Reset Input	Active-low input; assertion forces immediate RESET/RESET activation regardless of V_DD state
2 V_DD	Supply Voltage	Primary power input (2 V–6 V); powers internal reference, comparators, and output drivers
3 GND	Ground Reference	Analog and digital ground return; must be low-impedance connection for stable threshold accuracy
4 PFI	Power-Fail Input	Comparator input referenced to 1.25 V; used to monitor auxiliary supplies (e.g., 12 V via resistor divider)
5 PFO	Power-Fail Output	Active-low open-drain output signaling PFI undervoltage; requires external pull-up for logic-level interface
6 NC	No Connection	Internally unconnected pin; must remain floating or tied to GND (not V_DD) per datasheet guidance
7 RESET	Active-Low Reset Output	Push-pull output asserting low during V_DD undervoltage or MR assertion; drives standard CMOS inputs directly
8 RESET	Active-High Reset Output	Complementary push-pull output asserting high during fault condition; enables direct connection to processors needing active-high reset

Key Features

Feature	Design Value
Dual-complementary reset outputs	Simultaneous active-low and active-high RESET signals eliminate need for external level-shifting or inversion logic
Fixed 200 ms reset timeout	Guaranteed minimum delay ensures full processor initialization before release; no capacitor tolerance or aging drift
Integrated PFI/PFO comparator	Enables monitoring of secondary supply rails (e.g., 12 V, 3.3 V) using simple resistor dividers - no extra IC required
Low 50 µA max supply current	Supports always-on supervision in battery-powered equipment with multi-year shelf life
Pin-for-pin compatibility with MAX705–MAX708	Direct drop-in replacement for legacy supervisory circuits without PCB layout changes or firmware updates

Applications

Industrial Programmable Logic Controllers	Automotive Body Control Modules
Use Scenario: Supervising 5 V microcontroller supply in PLC I/O modules subject to 24 V field bus transients and thermal cycling. IC Role / Device Role / Timing Role: Primary V_DD supervisor asserting RESET/RESET on brownout; PFI monitors 12 V auxiliary rail for solenoid driver faults. Use Value: Prevents erratic operation during line dips; dual outputs simplify interface with both FPGA configuration logic (active-low) and MCU reset controller (active-high).	Use Scenario: Ensuring safe boot and shutdown sequencing in BCMs managing door locks, lighting, and window motors. IC Role / Device Role / Timing Role: Monitors main 5 V domain and detects battery voltage sag below 10.5 V (via PFI divider) to trigger graceful firmware save before power loss. Use Value: Eliminates need for separate voltage monitor IC; 200 ms reset hold guarantees EEPROM write completion before power collapse.
Portable Medical Instrumentation	Notebook System Power Management
Use Scenario: Supervising 5 V supply in handheld diagnostic devices powered by Li-ion batteries with variable discharge profiles. IC Role / Device Role / Timing Role: Detects end-of-battery (V_DD < 4.45 V) and asserts RESET/RESET to halt measurement acquisition and preserve calibration data. Use Value: 50 µA quiescent current extends standby time; PFI input allows simultaneous monitoring of battery pack voltage for low-battery warning.	Use Scenario: Providing robust reset coordination between CPU, chipset, and GPU power rails during AC/DC adapter transitions. IC Role / Device Role / Timing Role: Acts as primary 5 V supervisor while PFI monitors 3.3 V standby rail to detect S3/S4 resume readiness. Use Value: Complementary outputs drive both southbridge reset (active-low) and embedded controller reset (active-high) without glue logic.

Industrial Programmable Logic Controllers

Automotive Body Control Modules

Use Scenario: Supervising 5 V microcontroller supply in PLC I/O modules subject to 24 V field bus transients and thermal cycling.

IC Role / Device Role / Timing Role: Primary V_DD supervisor asserting RESET/RESET on brownout; PFI monitors 12 V auxiliary rail for solenoid driver faults.

Use Value: Prevents erratic operation during line dips; dual outputs simplify interface with both FPGA configuration logic (active-low) and MCU reset controller (active-high).

Use Scenario: Ensuring safe boot and shutdown sequencing in BCMs managing door locks, lighting, and window motors.

IC Role / Device Role / Timing Role: Monitors main 5 V domain and detects battery voltage sag below 10.5 V (via PFI divider) to trigger graceful firmware save before power loss.

Use Value: Eliminates need for separate voltage monitor IC; 200 ms reset hold guarantees EEPROM write completion before power collapse.

Portable Medical Instrumentation

Notebook System Power Management

Use Scenario: Supervising 5 V supply in handheld diagnostic devices powered by Li-ion batteries with variable discharge profiles.

IC Role / Device Role / Timing Role: Detects end-of-battery (V_DD < 4.45 V) and asserts RESET/RESET to halt measurement acquisition and preserve calibration data.

Use Value: 50 µA quiescent current extends standby time; PFI input allows simultaneous monitoring of battery pack voltage for low-battery warning.

Use Scenario: Providing robust reset coordination between CPU, chipset, and GPU power rails during AC/DC adapter transitions.

IC Role / Device Role / Timing Role: Acts as primary 5 V supervisor while PFI monitors 3.3 V standby rail to detect S3/S4 resume readiness.

Use Value: Complementary outputs drive both southbridge reset (active-low) and embedded controller reset (active-high) without glue logic.

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage supervisor applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS3707-50DGN	Same electrical specs; MSOP-PowerPAD (3.00 mm × 3.00 mm) package with thermal pad for improved heat dissipation	Suitable for space-constrained PCBs where SOIC footprint is prohibitive; requires reflow profile adjustment for thermal pad	Select DGN when board area is limited and thermal performance >1.11 W at 85°C is required
MAX708RCSA+	5 V supervisor with active-low RESET only; no complementary output or PFI input; 200 ms delay; ±1.5% threshold accuracy	Lacks PFI monitoring capability and active-high reset; requires external inverter if active-high signal needed	Choose MAX708RCSA+ only when design already uses MAX708 footprint and PFI functionality is unused

Compared with TPS3707-50DR, the TPS3707-50DGN offers identical supervision functionality in a smaller thermally enhanced package, while the MAX708RCSA+ provides legacy pin compatibility but omits PFI and complementary reset - limiting flexibility in modern multi-rail systems.

Availability

TPS3707-50DR is available at Aetrix Electronics and suitable for industrial automation, automotive electronics, portable instrumentation, and notebook computing applications requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for TPS3707-50DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company designing analog ICs, embedded processors, and system solutions for industrial, automotive, and consumer markets.

The TPS370x-xx product line delivers precision voltage supervision with integrated power-fail detection and flexible reset architectures for microprocessor-based systems requiring high reliability and minimal external components.

FAQ

What is the exact V_IT– threshold voltage for TPS3707-50DR across temperature?

The TPS3707-50DR has a guaranteed negative-going input threshold voltage (V_IT–) of 4.45 V (min) to 4.65 V (max) over the full operating temperature range of –40°C to +85°C. This 4.55 V nominal threshold is factory-trimmed and specified with 70 mV hysteresis to prevent oscillation during slow supply ramps. The value is confirmed in Section 7.5 Electrical Characteristics of TI SLVS184F Rev F.

Does TPS3707-50DR include a watchdog timer function?

No, the TPS3707-50DR does not include a watchdog timer. Unlike the TPS3705-xx series, the TPS3707-xx family replaces watchdog circuitry (WDI/WDO pins) with a second reset output (active-high RESET). This architectural distinction is explicitly stated in Section 8.3.3 and Figure 6-2 of the TPS3707-50DR datasheet.

How is the PFI input used in TPS3707-50DR applications?

The PFI input on the TPS3707-50DR compares an external voltage against an internal 1.25 V reference. When used with a resistor divider (e.g., 910 kΩ/120 kΩ for 12 V monitoring), it triggers PFO low if the monitored rail drops below ~10.7 V. This enables auxiliary supply supervision without adding discrete comparators - a capability confirmed in Figure 9-1 and Section 9.2.2 of the datasheet.

What are the absolute maximum ratings for TPS3707-50DR supply voltage?

The absolute maximum supply voltage (V_DD) for TPS3707-50DR is 7 V, as specified in Section 7.1 Absolute Maximum Ratings. Continuous operation above 6 V is not recommended; the device is rated for reliable operation from 2 V to 6 V per Section 7.3 Recommended Operating Conditions. Exceeding 7 V risks permanent damage.

Is TPS3707-50DR pin-compatible with MAX705–MAX708 series devices?

Yes, the TPS3707-50DR is explicitly documented as pin-for-pin compatible with the MAX705 through MAX708 series in Section 1 Features of the datasheet. This includes identical SOIC-8 pinout (MR, V_DD, GND, PFI, PFO, NC, RESET, RESET), enabling direct replacement without PCB modifications or firmware changes.

TPS3707-50DR Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 8-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Simple Reset/Power-On Reset

Number of Voltages Monitored:: 1

Voltage - Threshold:: 4.55V

Output:: Push-Pull, Totem Pole

Reset:: Active High/Active Low

Reset Timeout:: 140ms Minimum

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-SOIC

TPS3707-50DR FAQ

1.How can I place an order for TPS3707-50DR through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS3707-50DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS3707-50DR reliable?

The price and inventory of TPS3707-50DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3707-50DR is usually 5 days.

3.What payment methods are accepted for TPS3707-50DR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3707-50DR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TPS3707-50DR?

TPS3707-50DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS3707-50DR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS3707-50DR?

For technical support, including TPS3707-50DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3707-50DR requirements.

6.How does Aetrix verify that TPS3707-50DR is sourced from the original manufacturer or authorized distributors?

All TPS3707-50DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3707-50DR meets industry standards.

7.What is the process for return or replacement of TPS3707-50DR?

All TPS3707-50DR units undergo pre-shipment inspection (PSI). If there is an issue with TPS3707-50DR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS3707-50DR part is unused and in its original packaging.

Return procedure for TPS3707-50DR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…