Texas Instruments TPS37A543222DSKRQ1
- Part No.:
- TPS37A543222DSKRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
TPS37A543222DSKRQ1.pdf
- Description:
- AUTOMOTIVE 65-V WINDOW SUPERVISO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS37A543222DSKRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive dual-channel overvoltage/undervoltage detector with independent 65 V-rated SENSE1 (OV) and SENSE2 (UV) inputs, 1 µA typical quiescent current, 1% threshold accuracy (800 mV or 2.7–36 V options), and programmable sense/reset delays via external capacitors. It monitors battery rails in telematics control units and emergency call systems.
For engineers reviewing the TPS37A543222DSKRQ1 datasheet, TPS37A543222DSKRQ1 pinout, TPS37A543222DSKRQ1 application, or TPS37A543222DSKRQ1 equivalent, key selection factors include its dual OV/UV detection architecture, 65 V SENSE pin rating, WSON-10 (DSK) package with wettable flanks, and support for both open-drain and push-pull reset outputs with manual reset capability.
Technical Context
The TPS37A543222DSKRQ1 implements two independent voltage monitoring channels: SENSE1 detects overvoltage conditions with programmable hysteresis (2–13% or fixed 0.5–2.5 V), while SENSE2 detects undervoltage with matching hysteresis options. Each channel features separate CTSx (sense delay) and CTRx/MR (reset delay/manual reset) pins, enabling asymmetric timing control per rail.
Its architecture supports supply independence: VDD may operate from 2.7 V while SENSE pins monitor up to 65 V, and internal resistor dividers eliminate external components for fixed-threshold variants. The device lacks internal clamps, requiring external protection for transients exceeding absolute maximum ratings.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Range | 2.7 V to 65 V - enables direct connection to 12 V/24 V automotive battery without level-shifting. |
| Quiescent Current | 1 µA typical - minimizes standby power draw in always-on vehicle systems. |
| Voltage Threshold Accuracy | ±1% for 800 mV option; ±1.5% for 2.7–36 V range - ensures precise fault detection across temperature (–40°C to +125°C). |
| Hysteresis Options | 2–13% in 1% steps, or fixed 0.5/1/1.5/2/2.5 V - suppresses false resets during cold-crank or start-stop transients. |
| Sense Delay Range | 1.28 ms to 1.28 s (via 10 nF–10 µF capacitor on CTS1/CTS2) - configurable debouncing for noisy supply rails. |
| Reset Delay Range | 12.8 ms to 12.8 s (via 10 nF–10 µF capacitor on CTR1/CTR2) - programmable hold time for system-level recovery sequencing. |
| Output Topology | Open-drain or push-pull, active-low or active-high - flexible interface with MCU reset inputs or logic controllers. |
Pinout & Package
TPS37A543222DSKRQ1 is packaged in a 10-pin WSON (DSK) with 2.5 mm × 2.5 mm body size and wettable flanks for AOI/X-ray inspection. The central thermal pad is non-conductive to meet IEC60664 creepage requirements between VDD and GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Power input | Bypassed with 0.1 µF capacitor; supplies internal circuitry and supports 2.7–65 V operation. |
| SENSE1 | Overvoltage monitor input | Detects rising voltage excursions above VIT+; high-impedance input accepts direct battery connection or resistor divider. |
| SENSE2 | Undervoltage monitor input | Detects falling voltage below VIT−; independent of VDD voltage level, enabling monitoring of higher/lower rails. |
| GND | Ground reference | All GND pins must be connected to PCB ground plane for stable operation and ESD path. |
| RESET1_OV## | Channel 1 reset output | Asserts on SENSE1 overvoltage; ## denotes OD/PP and active-low/high configuration per variant. |
| RESET2_UVOD | Channel 2 reset output | Asserts on SENSE2 undervoltage; open-drain output requires external pull-up for active-low signaling. |
| CTR1/MR | Channel 1 reset delay & manual reset | Capacitor sets reset hold time; driven low forces immediate RESET1 assertion - no high-drive required. |
| CTR2/MR | Channel 2 reset delay & manual reset | Capacitor sets reset hold time; driven low forces immediate RESET2 assertion - compatible with push-button MR. |
| CTS1 | Channel 1 sense delay | Capacitor sets debounce window before RESET1 assertion - rejects short-duration voltage glitches. |
| CTS2 | Channel 2 sense delay | Capacitor sets debounce window before RESET2 assertion - independently configurable per monitored rail. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent OV/UV detection | Enables simultaneous monitoring of critical supply rails (e.g., MCU core and analog sensor bias) with separate thresholds and timing. |
| 65 V-rated SENSE pins | Allows direct connection to automotive battery without external voltage scaling, reducing BOM count and board space. |
| Integrated resistor divider | Eliminates external resistors for fixed-threshold variants, removing leakage current and improving long-term accuracy stability. |
| Programmable hysteresis | Configurable 2–13% or fixed-step hysteresis prevents chatter during slow-ramping transients like cold crank or alternator load dump. |
| Wettable flank WSON package | Facilitates automated optical inspection (AOI) and low-resolution X-ray verification, improving manufacturing yield in automotive production. |
Applications
| Telematics Control Unit | Emergency Call System |
|---|---|
Use Scenario: Continuous monitoring of 12 V battery rail during vehicle ignition cycles and sleep modes. IC Role / Device Role / Timing Role: Dual-channel OV/UV detector asserting RESET1 on battery overvoltage (>16 V) and RESET2 on undervoltage (<9 V), with 100 ms sense delay to ignore cranking dips. Use Value: Prevents MCU corruption during alternator regulation faults or deep-discharge events while maintaining ultra-low standby current. | Use Scenario: Power integrity supervision for eCall module during crash-triggered activation. IC Role / Device Role / Timing Role: SENSE1 monitors backup battery voltage (OV at 4.2 V); SENSE2 monitors main rail (UV at 10.5 V); CTR2 sets 500 ms reset hold to ensure full modem initialization. Use Value: Guarantees reliable eCall transmission by enforcing clean power-up sequence after collision-induced voltage sag. |
| Audio Amplifier | Head Unit and Cluster |
Use Scenario: Protection against amplifier shutdown due to unstable 12 V supply during engine start. IC Role / Device Role / Timing Role: SENSE2 detects UV condition (<10.2 V) on amplifier VCC; CTS2 applies 20 ms debounce to reject starter motor noise; RESET2 holds amplifier enable until stable. Use Value: Eliminates audible pop/click artifacts caused by premature amplifier enable during cranking. | Use Scenario: Coordinated reset sequencing between infotainment MCU and instrument cluster display driver. IC Role / Device Role / Timing Role: RESET1 (OV) guards 5 V LDO input; RESET2 (UV) guards 3.3 V rail; independent CTR1/CTR2 delays align reset release with power supply ramp rates. Use Value: Ensures deterministic boot order and avoids bus contention between subsystems sharing common power domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel voltage monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS37A543221DSKRQ1 | Identical pinout and package; differs only in output topology: RESET1 is open-drain, RESET2 is push-pull (vs. both open-drain in TPS37A543222DSKRQ1). | Requires external pull-up on RESET1 but eliminates need for pull-up on RESET2 - reduces component count where active-high push-pull reset is preferred. | Select when mixed-output topology simplifies interface with heterogeneous downstream logic families. |
| TPS37A543223DSKRQ1 | Same package and electrical specs; differs in hysteresis configuration: supports only percentage-based hysteresis (2–13%), not fixed-voltage options (0.5–2.5 V). | Lacks fixed-hysteresis variants needed for legacy designs specifying exact hysteresis voltage (e.g., 1.0 V) rather than percentage. | Select when design uses percentage hysteresis exclusively and does not require fixed-step hysteresis values. |
Compared with TPS37A543221DSKRQ1 and TPS37A543223DSKRQ1, the TPS37A543222DSKRQ1 provides full flexibility in output topology (both open-drain) and hysteresis selection (percentage or fixed-voltage), making it the most broadly applicable variant for new automotive monitoring designs requiring consistent output behavior and precise hysteresis control.
Availability
TPS37A543222DSKRQ1 is available at Aetrix Electronics and suitable for telematics control units, emergency call systems, and head unit and cluster applications requiring stable component supply, AEC-Q100 compliance, and long-term automotive lifecycle support.
Supply support for TPS37A543222DSKRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive-grade ICs with decades of automotive qualification expertise.
The TPS37-Q1 product line delivers high-voltage, ultra-low-quiescent-current voltage supervisors optimized for demanding automotive power-rail monitoring, including telematics, ADAS, and body electronics.
FAQ
What is the function of the CTS1 and CTS2 pins on the TPS37A543222DSKRQ1?
The CTS1 and CTS2 pins on the TPS37A543222DSKRQ1 provide user-programmable sense time delay for Channel 1 (SENSE1/OV) and Channel 2 (SENSE2/UV), respectively. Connecting a capacitor from each pin to ground sets the debounce interval-10 nF yields 1.28 ms, and 10 µF yields 1.28 s-preventing false resets from transient voltage spikes on monitored rails. This functionality is confirmed in Section 7.6 and Figure 7-22 of the official datasheet.
Does the TPS37A543222DSKRQ1 support both overvoltage and undervoltage detection simultaneously?
Yes, the TPS37A543222DSKRQ1 performs simultaneous dual-channel monitoring: SENSE1 detects overvoltage conditions (e.g., >16 V on a 12 V rail), while SENSE2 detects undervoltage (e.g., <9 V), each with independent thresholds, hysteresis, and timing controls. This is explicitly stated in the device description and functional block diagram of the TPS37-Q1 datasheet (SNVSBD9E).
What package type and dimensions does the TPS37A543222DSKRQ1 use?
The TPS37A543222DSKRQ1 uses the WSON-10 (DSK) package with nominal body dimensions of 2.5 mm × 2.5 mm and wettable flanks for automated optical inspection. The mechanical drawing and package details are specified in the Device Information table of the TPS37-Q1 datasheet (SNVSBD9E, page 3).
Can the TPS37A543222DSKRQ1 monitor voltages higher than its VDD supply?
Yes, the TPS37A543222DSKRQ1 allows SENSE1 and SENSE2 to monitor voltages up to 65 V independently of VDD, which may be as low as 2.7 V. This enables direct battery monitoring while powering the IC from a regulated 3.3 V or 5 V rail-a key feature highlighted in Section 3 (Description) and Section 8.1 (Overview) of the datasheet.
What is the accuracy and temperature range for the voltage thresholds of the TPS37A543222DSKRQ1?
The TPS37A543222DSKRQ1 provides ±1% accuracy for the 800 mV threshold option and ±1.5% for the 2.7–36 V range, guaranteed over the full AEC-Q100 Grade 1 ambient operating temperature range of –40°C to +125°C. These specifications are documented in Section 7.5 (Electrical Characteristics) of the official datasheet SNVSBD9E.
TPS37A543222DSKRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Voltage Detector
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 3.2V, 5.4V
- Output:
- Open Drain, Open Drain
- Reset:
- Active Low
- Reset Timeout:
- 100µs Maximum
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-WSON (2.5x2.5)
TPS37A543222DSKRQ1 FAQ
1.How can I place an order for TPS37A543222DSKRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS37A543222DSKRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS37A543222DSKRQ1 reliable?
The price and inventory of TPS37A543222DSKRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS37A543222DSKRQ1 is usually 5 days.
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5.How can I obtain technical support or documentation for TPS37A543222DSKRQ1?
For technical support, including TPS37A543222DSKRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS37A543222DSKRQ1 requirements.
6.How does Aetrix verify that TPS37A543222DSKRQ1 is sourced from the original manufacturer or authorized distributors?
All TPS37A543222DSKRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS37A543222DSKRQ1 meets industry standards.
7.What is the process for return or replacement of TPS37A543222DSKRQ1?
All TPS37A543222DSKRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS37A543222DSKRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS37A543222DSKRQ1 part is unused and in its original packaging.
Return procedure for TPS37A543222DSKRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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