Texas Instruments TPS3808EG33DBVRQ1
- Part No.:
- TPS3808EG33DBVRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- SOT-23-6
- Datasheet:
-
TPS3808EG33DBVRQ1.pdf
- Description:
- AUTOMOTIVE, 600-NA ULTRA-LOW QUI
- Quantity:
- Payment:

- Shipping:

Inventory:2,571
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS3808EG33DBVRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive-grade microprocessor supervisory circuit that monitors 3.3V power rails with ±0.5% threshold accuracy (3.07V nominal), asserts an open-drain RESET signal on undervoltage or manual reset, and supports user-programmable delay from 1.25ms to 150s via external capacitor on CT pin - deployed in ADAS domain controllers and digital cockpit processing units.
For engineers reviewing the TPS3808EG33DBVRQ1 datasheet, TPS3808EG33DBVRQ1 pinout, TPS3808EG33DBVRQ1 application, or TPS3808EG33DBVRQ1 equivalent, key selection considerations include its 0.6μA quiescent current, SOT-23-6 package (2.9mm × 1.6mm), –40°C to +125°C operating range, 90kΩ internal MR pull-up, and precise 3.07V undervoltage detection threshold for 3.3V rail monitoring.
Technical Context
The TPS3808EG33DBVRQ1 uses a precision internal reference to achieve ±0.5% voltage threshold accuracy and incorporates hysteresis (1–2.5%) to prevent oscillatory RESET assertion during slow-rail transitions. Its reset timing is controlled by an on-chip 220nA current source charging an external capacitor connected to the CT pin.
It operates across 1.7V–6V supply range, features separate SENSE and VDD pins for independent monitoring and power routing, and implements glitch immunity of 5µs on SENSE and 50ns on MR - enabling robust operation in noisy automotive environments where transient suppression and deterministic reset behavior are critical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Threshold Voltage | 3.07V ±0.5% (nominal 3.3V rail monitoring; enables accurate brownout detection without external resistor divider) |
| Quiescent Current | 0.6μA typical at 3.3V (supports always-on battery-backed systems with multi-year standby life) |
| Reset Delay Range | 1.25ms to 150s (user-programmable via CT-to-GND capacitor; covers boot sequencing, FPGA configuration, and safety-critical timeout requirements) |
| Operating Temp | –40°C to +125°C junction (AEC-Q100 Grade 1 qualified; validated for under-hood and infotainment module deployment) |
| Output Type | Open-drain RESET (supports level-shifting up to 6V with external pull-up; compatible with diverse MCU reset inputs) |
| MR Input Pull-up | 90kΩ internal (eliminates need for external pull-up; simplifies manual reset interface while limiting standby current) |
| SENSE Input Bias | ≤1.25μA max at 6V (minimizes loading on monitored rail; preserves accuracy in low-power sensor subsystems) |
Pinout & Package
TPS3808EG33DBVRQ1 is housed in a 6-pin SOT-23 package (2.9mm × 1.6mm body size) with gull-wing leads, optimized for high-density automotive PCB layouts and reflow-compatible assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RESET | Open-drain output | Asserts low during undervoltage or MR event; requires external 10kΩ–1MΩ pull-up; supports voltage translation above VDD (up to 6V) |
| GND | Ground reference | Primary return path for internal circuitry and SENSE comparator; must be low-impedance connection to system ground plane |
| MR | Manual reset input | Logic-low (≤0.3×VDD) triggers immediate RESET assertion; internally pulled up to VDD via 90kΩ resistor |
| CT | Reset delay programming | Connect to GND via capacitor (≥130pF) to set delay; open = 20ms, tied to VDD via 40–200kΩ = 300ms |
| SENSE | Voltage monitoring input | Direct connection to 3.3V rail; detects drop below 3.07V; high-impedance input minimizes loading |
| VDD | Supply input | Power source (1.7–6V); requires local 0.1μF ceramic decoupling capacitor per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use from –40°C to +125°C TJ; meets reliability and stress-test requirements for safety-critical ECUs |
| Fixed 3.3V threshold option | Factory-trimmed 3.07V trip point eliminates external resistor divider, reducing BOM count and layout area in 3.3V systems |
| Ultra-low quiescent current | 0.6μA typical enables integration into always-on domains (e.g., telematics wake-up circuits) without compromising battery life |
| Programmable reset delay | Three configuration modes (open, resistor-to-VDD, capacitor-to-GND) provide flexibility for diverse boot timing requirements across MCU/FPGA platforms |
| Separate SENSE and VDD pins | Enables monitoring of one rail (e.g., 3.3V I/O) while powered from another (e.g., 5V supply), supporting mixed-voltage system architectures |
Applications
| ADAS Domain Controller | Automotive Gateway |
|---|---|
Use Scenario: Monitors primary 3.3V power rail supplying radar preprocessing SoC and CAN FD transceivers during cold cranking and load dump events. IC Role / Device Role / Timing Role: Supervisory circuit asserting RESET if rail dips below 3.07V; delay set to 100ms to tolerate brief transients while ensuring clean boot after recovery. Use Value: Prevents corrupted firmware execution due to marginal voltage, meeting ASIL-B functional safety timing constraints for sensor fusion modules. | Use Scenario: Ensures reliable startup of dual-core ARM Cortex-A53 gateway MCU after ignition cycle, coordinating power-up sequencing with Ethernet AVB and LIN subsystems. IC Role / Device Role / Timing Role: Generates synchronized RESET pulse with 20ms fixed delay (CT open) aligned to power supply stabilization time. Use Value: Eliminates need for discrete RC network; reduces component count and improves timing repeatability across temperature and unit variance. |
| Digital Cockpit Processing Unit | Telematics Control Unit |
Use Scenario: Guards 3.3V display interface power in head-up display (HUD) controller, where undervoltage could cause pixel corruption or ghosting. IC Role / Device Role / Timing Role: Uses SENSE pin directly on 3.3V rail; RESET output drives GPU reset line with 50ms delay to allow power rail settling before graphics initialization. Use Value: Leverages ±0.5% threshold accuracy to avoid false resets during dynamic backlight dimming, improving perceived system robustness. | Use Scenario: Provides fail-safe reset for LTE modem and GNSS receiver in cellular-connected TCU, operating continuously from vehicle battery. IC Role / Device Role / Timing Role: Powered from 3.3V LDO; monitors same rail via SENSE; CT configured with 100nF capacitor for 1.5s delay to accommodate modem warm-up sequence. Use Value: 0.6μA quiescent current extends parked-vehicle battery life beyond 30 days without recharge, satisfying OEM parasitic drain specifications. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supervisory circuit applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G33DBVRQ1 | Same pinout and electrical specs; differs only in production lot traceability and qualification documentation (non-E suffix denotes standard automotive flow vs. enhanced E-series test coverage) | Identical functional behavior in all automotive applications; no design change required | Select when full TPS3808E-Q1 qualification evidence (e.g., detailed AEC-Q100 report) is not contractually mandated |
| MAX6326LT33D2T | Fixed 3.3V threshold (3.08V), 2.7μA IQ, 200ms fixed delay, SOT23-5 package (no MR pin) | Lacks manual reset and programmable delay; suitable only for basic reset needs without system-level control | Choose only if MR functionality and delay flexibility are unnecessary and higher IQ is acceptable |
Compared with TPS3808EG33DBVRQ1, TPS3808G33DBVRQ1 offers identical performance with streamlined qualification reporting, while MAX6326LT33D2T trades programmability and ultra-low IQ for lower cost and simpler integration where MR and adjustable timing are not needed.
Availability
TPS3808EG33DBVRQ1 is available at Aetrix Electronics and suitable for ADAS domain controllers, automotive gateways, and digital cockpit processing units requiring stable component supply across extended automotive lifecycles.
Supply support for TPS3808EG33DBVRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in automotive ICs, power management, and precision analog.
The TPS3808E-Q1 product line delivers AEC-Q100 qualified supervisory circuits optimized for automotive power-rail monitoring, featuring ultra-low IQ, programmable timing, and high-threshold accuracy to meet functional safety and long-battery-life requirements.
FAQ
What is the exact voltage threshold and accuracy of the TPS3808EG33DBVRQ1?
The TPS3808EG33DBVRQ1 has a nominal undervoltage threshold of 3.07V for monitoring 3.3V rails, with ±0.5% accuracy over temperature (–40°C to +125°C). This specification is factory-trimmed and does not require external components. The threshold is defined as VIT-(UV) and includes built-in hysteresis of 1–2.5% to prevent chatter during slow voltage transitions. This accuracy is confirmed in Section 6.5 of the official datasheet SBVS430C.
How is the reset delay time configured on the TPS3808EG33DBVRQ1?
The TPS3808EG33DBVRQ1 supports three reset delay configurations via the CT pin: leaving CT open yields 20ms, connecting CT to VDD through a 40kΩ–200kΩ resistor gives 300ms, and connecting CT to GND via a capacitor (≥130pF) enables user-programmable delays from 1.25ms to 150s. The delay is generated by an internal 220nA current source charging the external capacitor. This behavior is documented in Sections 5, 6.6, and 8.3.2 of the datasheet.
Does the TPS3808EG33DBVRQ1 require external components for basic operation?
Yes - the TPS3808EG33DBVRQ1 requires a 0.1μF ceramic capacitor on the VDD pin for stable operation, and an external pull-up resistor (10kΩ–1MΩ) on the open-drain RESET pin. If using programmable delay, a capacitor between CT and GND is needed; if using fixed delay, no additional components are required beyond those two. The internal 90kΩ MR pull-up eliminates the need for an external resistor unless driving MR from a non-rail-to-rail source.
Is the TPS3808EG33DBVRQ1 pin-compatible with other members of the TPS3808E-Q1 family?
Yes - all TPS3808E-Q1 variants, including TPS3808EG33DBVRQ1, share identical SOT-23-6 (DBV) packaging and pinout. The only differences are factory-set threshold voltages (e.g., TPS3808EG12DBVRQ1 = 1.12V, TPS3808EG50DBVRQ1 = 4.65V) and associated electrical parameters. This allows direct substitution within the same package footprint when adjusting for different rail voltages, provided timing and accuracy requirements align.
What automotive qualification level does the TPS3808EG33DBVRQ1 meet?
The TPS3808EG33DBVRQ1 is AEC-Q100 qualified to Grade 1, meaning it is specified for operation from –40°C to +125°C junction temperature and has passed stress tests including HTOL, TC, UHAST, and ESD (±2000V HBM, ±1000V CDM). This qualification is explicitly stated in the "Features" section and verified in the device's qualification report referenced in the TI product folder.
TPS3808EG33DBVRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- SOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 3.07V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 180ms Minimum
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
TPS3808EG33DBVRQ1 FAQ
1.How can I place an order for TPS3808EG33DBVRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3808EG33DBVRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3808EG33DBVRQ1 reliable?
The price and inventory of TPS3808EG33DBVRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3808EG33DBVRQ1 is usually 5 days.
3.What payment methods are accepted for TPS3808EG33DBVRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3808EG33DBVRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS3808EG33DBVRQ1?
TPS3808EG33DBVRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS3808EG33DBVRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3808EG33DBVRQ1?
For technical support, including TPS3808EG33DBVRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3808EG33DBVRQ1 requirements.
6.How does Aetrix verify that TPS3808EG33DBVRQ1 is sourced from the original manufacturer or authorized distributors?
All TPS3808EG33DBVRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3808EG33DBVRQ1 meets industry standards.
7.What is the process for return or replacement of TPS3808EG33DBVRQ1?
All TPS3808EG33DBVRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS3808EG33DBVRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3808EG33DBVRQ1 part is unused and in its original packaging.
Return procedure for TPS3808EG33DBVRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS3808EG33DBVRQ1 Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
