Texas Instruments TPS3808G01MDBVTEP
- Part No.:
- TPS3808G01MDBVTEP
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- SOT-23-6
- Datasheet:
-
TPS3808G01MDBVTEP.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL SOT23-6
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS3808G01MDBVTEP from Texas Instruments is an extended-temperature, low-quiescent-current supervisory circuit with adjustable reset delay and user-programmable threshold voltage down to 0.405 V. It features 0.5% typical threshold accuracy (for VIT ≤ 3.3 V), 2.4 μA typical supply current, and operates across –55°C to +125°C. It asserts an open-drain RESET signal when SENSE falls below VIT or MR is pulled low-used in FPGA power sequencing, DSP voltage monitoring, and battery-powered industrial controllers.
For engineers reviewing the TPS3808G01MDBVTEP datasheet, TPS3808G01MDBVTEP pinout, TPS3808G01MDBVTEP application, or TPS3808G01MDBVTEP equivalent, key selection criteria include its programmable 1.25 ms–10 s delay via external capacitor, ±0.5% VIT accuracy at low thresholds, SOT-23-6 package compatibility, and guaranteed operation over military-grade temperature range.
Technical Context
The TPS3808G01MDBVTEP implements a precision bandgap reference and comparator with built-in hysteresis (VHYS = 0.5%–3.0% of VIT) to prevent false resets during voltage transients. Its internal 220 nA CT charging current source enables accurate, temperature-stable delay timing independent of VDD fluctuations.
It supports three delay configurations: open CT (20 ms), CT-to-VDD via 40–200 kΩ resistor (300 ms), or CT-to-GND capacitor (1.25 ms–10 s). The SENSE input accepts voltages from 0.405 V upward using an external resistor divider, while MR provides logic-controlled reset initiation with 90 kΩ internal pullup.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.7 V to 6.5 V - supports wide-input systems including 1.8 V, 3.3 V, and 5 V rails without level-shifting. |
| Quiescent Current | 2.4 μA typical - enables multi-year battery life in always-on monitoring applications. |
| Threshold Accuracy | ±0.5% typical for VIT ≤ 3.3 V - ensures precise brownout detection critical for low-voltage ASICs and core logic. |
| Reset Delay Range | 1.25 ms to 10 s - programmable via external CT capacitor ≥100 pF, enabling compliance with diverse processor reset timing requirements. |
| Operating Temperature | –55°C to +125°C - qualified per JEDEC extended-temperature standards for aerospace, defense, and under-hood automotive use. |
| Output Type | Open-drain RESET - allows voltage-level translation up to 6.5 V and wired-OR configuration with other reset sources. |
| SENSE Input Range | 0.405 V to 5.0 V - configurable via external resistor divider, supporting sub-1 V core rail monitoring (e.g., 0.8 V, 0.9 V). |
Pinout & Package
SOT-23-6 (DBV) package, 2.90 mm × 1.60 mm body size, 1.45 mm max height, JEDEC-compliant footprint with gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: RESET | Open-drain output | Asserted low during reset; requires external pullup (10 kΩ–1 MΩ); supports voltage levels up to 6.5 V independent of VDD. |
| 2: GND | Ground reference | Primary return path for internal circuitry and CT capacitor discharge; must be connected to system ground plane. |
| 3: MR | Manual reset input | Active-low control pin with 90 kΩ internal pullup to VDD; drives RESET low when pulled ≤0.3×VDD. |
| 4: CT | Delay timing input | Connects to internal 220 nA current source; open = 20 ms, tied to VDD via 40–200 kΩ = 300 ms, or to GND via ≥100 pF cap = programmable delay. |
| 5: SENSE | Voltage monitor input | High-impedance comparator input; monitors any rail ≥0.405 V using external resistor divider; includes hysteresis for noise immunity. |
| 6: VDD | Power supply input | Supplies internal circuitry; requires 0.1 μF ceramic decoupling capacitor placed adjacent to pin per layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable threshold voltage | Configurable from 0.405 V upward using external resistor divider - enables monitoring of modern ultra-low-voltage cores (e.g., 0.8 V FPGA I/O, 0.9 V DSP cores). |
| Precision reset delay | 1.25 ms–10 s programmable via single external capacitor - eliminates need for discrete RC networks or additional timing ICs. |
| Low-power supervision | 2.4 μA typical quiescent current - reduces standby power in battery-backed systems by >90% vs. legacy supervisors. |
| Extended temperature qualification | –55°C to +125°C operation with HAST, temperature cycling, and bond intermetallic life testing - meets MIL-PRF-38535 Class V requirements. |
| Robust SENSE transient immunity | Maximum transient rejection up to 40 µs at 5% VIT overdrive - prevents spurious resets during ESD or switching noise events. |
Applications
| FPGA Power Sequencing | DSP Core Voltage Monitoring |
|---|---|
Use Scenario: Ensures proper power-up order for multi-rail FPGA designs (e.g., VCCINT before VCCAUX) by generating staggered reset signals based on individual rail readiness. IC Role / Device Role / Timing Role: Supervisory circuit asserting open-drain RESET only after all monitored rails exceed their programmed thresholds and delay expires. Use Value: Prevents FPGA configuration corruption by guaranteeing strict voltage sequencing compliance with Xilinx/Intel spec requirements. |
Use Scenario: Monitors 0.9 V DSP core supply in portable medical imaging equipment where brownout must trigger controlled shutdown before data loss occurs. IC Role / Device Role / Timing Role: Adjustable-threshold supervisor detecting sub-1 V rail collapse with <±0.5% accuracy and 20 ms minimum assertion time. Use Value: Enables deterministic, non-recoverable fault response aligned with TI C6000-series DSP reset timing specifications. |
| Battery-Powered Telemetry Node | Aerospace Avionics Health Monitor |
Use Scenario: Provides ultra-low-power reset supervision for LoRaWAN sensor nodes operating on coin-cell batteries for >5 years. IC Role / Device Role / Timing Role: Low-IDD (2.4 μA) supervisor asserting RESET on 1.8 V system rail drop, with 300 ms delay to allow wake-up recovery. Use Value: Extends operational lifetime by minimizing quiescent draw while maintaining reliable brownout detection across temperature extremes. |
Use Scenario: Embedded in flight control unit to monitor 28 V DC bus-derived 3.3 V and 5 V supplies under vibration, thermal cycling, and radiation exposure. IC Role / Device Role / Timing Role: Extended-temperature (–55°C to +125°C) supervisor with JEDEC-qualified pedigree, asserting RESET within 20 ms of undervoltage event. Use Value: Meets DO-160 Section 22 environmental test requirements and supports AS6081 counterfeit mitigation via traceable sourcing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supervisory circuit applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G33MDBVREP | Fixed 3.3 V threshold; same SOT-23-6 package, 20 ms/300 ms delay options, identical quiescent current and temp range. | Not suitable for sub-3.3 V rails; eliminates need for external resistor divider but lacks flexibility for custom thresholds. | Select when monitoring standard 3.3 V I/O rails only and board space is constrained. |
| MAX6369ESA+ | Fixed 2.93 V threshold; 1.5 μA IDD; 16-pin SOIC package; no CT-programmable delay - offers only fixed 140 ms or 1.12 s delays. | Larger footprint; lower quiescent current but no sub-1 V monitoring capability; limited delay granularity. | Choose for cost-sensitive industrial PLCs where 2.93 V rail supervision suffices and SOIC assembly is preferred. |
Compared with TPS3808G33MDBVREP, the TPS3808G01MDBVTEP trades fixed-threshold simplicity for full voltage programmability below 1 V; versus MAX6369ESA+, it delivers superior package density, wider voltage range, and finer delay resolution at marginally higher IDD.
Availability
TPS3808G01MDBVTEP is available at Aetrix Electronics and suitable for FPGA power sequencing, DSP core voltage monitoring, and battery-powered telemetry nodes requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TPS3808G01MDBVTEP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with over 50 years of innovation in power management, signal chain, and high-reliability components.
The TPS3808-EP product line was designed specifically for aerospace, defense, and industrial applications demanding extended-temperature operation, enhanced manufacturing pedigree, and long-term supply assurance under MIL-PRF-38535 Class V conditions.
FAQ
What is the minimum detectable voltage threshold for TPS3808G01MDBVTEP?
The TPS3808G01MDBVTEP supports a minimum threshold of 0.405 V when configured with an external resistor divider on the SENSE pin. This is achieved using the internal 0.405 V reference; the actual monitored voltage equals (1 + R1/R2) × 0.405 V, enabling precise supervision of sub-1 V rails like 0.8 V FPGA cores or 0.9 V DSP supplies.
How does the CT pin configure reset delay in TPS3808G01MDBVTEP?
The CT pin on TPS3808G01MDBVTEP controls reset delay via three configurations: open-circuit yields 20 ms, connection to VDD through a 40–200 kΩ resistor yields 300 ms, and connection to GND via a ≥100 pF capacitor enables user-programmable delay from 1.25 ms to 10 s. An internal 220 nA current source charges the capacitor to 1.23 V to determine deassertion timing.
Does TPS3808G01MDBVTEP support operation above 125°C junction temperature?
No. The TPS3808G01MDBVTEP is fully specified and qualified for operation from –55°C to +125°C junction temperature. Absolute maximum ratings permit short-term exposure up to +150°C, but functional performance-including threshold accuracy, delay timing, and quiescent current-is only guaranteed within the –55°C to +125°C range per JEDEC extended-temperature qualification.
What is the recommended pullup resistor value for the RESET pin of TPS3808G01MDBVTEP?
A pullup resistor between 10 kΩ and 1 MΩ is recommended for the open-drain RESET pin of TPS3808G01MDBVTEP. Lower values improve rise time but increase static current; higher values minimize current draw but may slow edge transitions. For 3.3 V systems with 100 pF load, 100 kΩ provides optimal balance of speed and power efficiency.
Can TPS3808G01MDBVTEP monitor multiple voltage rails simultaneously?
TPS3808G01MDBVTEP monitors one rail per device via its SENSE pin. To supervise multiple rails, multiple TPS3808G01MDBVTEP units can be used in parallel, or the MR pin can be driven by the RESET output of another supervisor-enabling cascaded or OR'd reset generation. The datasheet shows MR-driven multi-rail monitoring using external logic or FETs.
TPS3808G01MDBVTEP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- SOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -55°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-6
TPS3808G01MDBVTEP FAQ
1.How can I place an order for TPS3808G01MDBVTEP through Aetrix?
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6.How does Aetrix verify that TPS3808G01MDBVTEP is sourced from the original manufacturer or authorized distributors?
All TPS3808G01MDBVTEP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3808G01MDBVTEP meets industry standards.
7.What is the process for return or replacement of TPS3808G01MDBVTEP?
All TPS3808G01MDBVTEP units undergo pre-shipment inspection (PSI). If there is an issue with TPS3808G01MDBVTEP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3808G01MDBVTEP part is unused and in its original packaging.
Return procedure for TPS3808G01MDBVTEP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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