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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Texas Instruments TPS3808G12DBVRG4

Name: TPS3808G12DBVRG4
Brand: Texas Instruments
SKU: TPS3808G12DBVRG4
Price: 2.40 USD
Availability: InStock
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Part No.:: TPS3808G12DBVRG4

Manufacturer:: Texas Instruments

Category:: Supervisors

Package:: SOT-23-6

Datasheet:: TPS3808G12DBVRG4.pdf

Description:: IC SUPERVISOR 1 CHANNEL SOT23-6

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Product details

Overview

TPS3808G12DBVRG4 from Texas Instruments is a low-quiescent-current, programmable-delay supervisory circuit designed to monitor 1.2 V system rails and assert an open-drain RESET signal when the SENSE voltage drops below 1.12 V. It delivers 0.5% threshold accuracy, 2.4 μA typical supply current, and user-adjustable reset delay from 1.25 ms to 10 s-enabling reliable power-on reset in battery-powered microcontroller systems.

For engineers reviewing the TPS3808G12DBVRG4 datasheet, TPS3808G12DBVRG4 pinout, TPS3808G12DBVRG4 application, or TPS3808G12DBVRG4 equivalent, key selection criteria include its fixed 1.12 V threshold for 1.2 V rails, SOT-23-6 package compatibility, −40°C to 125°C operating range, and support for manual reset (MR) and capacitor-programmable timing via CT pin.

Technical Context

The TPS3808G12DBVRG4 implements a precision voltage comparator with built-in hysteresis (1% of VIT) and a programmable timer driven by a 220 nA on-chip current source charging the external CT capacitor. Its SENSE input monitors rail voltage directly, while MR provides asynchronous reset initiation independent of supply monitoring.

RESET assertion is governed by dual conditions: SENSE falling below 1.12 V or MR pulled low. Deassertion requires both SENSE > 1.12 V + VHYS and MR high, followed by the full programmed delay period-ensuring stable release after transient recovery or manual trigger.

Key Specifications

Parameter	Value and Actual Design Meaning
Threshold Voltage (VIT)	1.12 V ±0.5% - precisely matches 1.2 V nominal rail with minimal undervoltage margin for clean reset activation.
Quiescent Current (IDD)	2.4 μA typical at 3.3 V - enables multi-year battery life in always-on portable devices without compromising supervision integrity.
Reset Delay Range	1.25 ms to 10 s - set via CT pin capacitor (≥100 pF); open CT = 20 ms, CT-to-VDD = 300 ms - supports diverse processor boot timing requirements.
Operating Temperature	−40°C to 125°C - fully specified for automotive under-hood, industrial control, and extended-range embedded applications.
Supply Voltage Range	1.7 V to 6.5 V - allows direct connection to 1.8 V, 2.5 V, 3.3 V, or 5 V logic supplies while monitoring lower-voltage rails like 1.2 V core.
Output Type	Open-drain RESET - permits level-shifting up to 6.5 V with external pull-up, enabling interface with higher-voltage processors or FPGAs.
MR Input Pull-up	90 kΩ internal resistor - eliminates need for external pull-up when MR is unused, reducing BOM count and board space.

Pinout & Package

SOT-23-6 (DBV) package: 2.90 mm × 1.60 mm body, 0.95 mm height, gull-wing leads, RoHS-compliant matte tin lead finish, MSL Level-1.

Pin/Terminal	Circuit Role	Design Meaning
1: RESET	Open-drain output	Drives low during reset assertion; requires external 10 kΩ–1 MΩ pull-up to define logic-high voltage (up to 6.5 V).
2: GND	Ground reference	Primary return path for internal circuitry and CT capacitor discharge; must connect to low-impedance system ground plane.
3: MR	Manual reset input	Active-low asynchronous trigger; internally pulled up to VDD (90 kΩ), so left floating = no reset; logic low <0.3×VDD asserts RESET immediately.
4: CT	Delay timing control	Connects to external capacitor (≥100 pF) to set delay; open = 20 ms, tied to VDD via 40–200 kΩ = 300 ms, capacitor-to-GND = programmable 1.25 ms–10 s.
5: SENSE	Voltage monitoring input	Direct connection point for monitored rail (e.g., 1.2 V core); comparator triggers RESET if voltage falls below 1.12 V.
6: VDD	Power supply input	Supplies internal circuitry; requires 0.1 μF ceramic decoupling capacitor placed adjacent to pin per analog design best practice.

Key Features

Feature	Design Value
Precision 1.12 V threshold	0.5% accuracy over −40°C to 125°C ensures consistent reset behavior across temperature without calibration.
Ultra-low 2.4 μA quiescent current	Minimizes standby power draw in always-on systems such as IoT sensors and wearables, extending battery service life.
Programmable reset delay	Three configuration modes (open, resistor-to-VDD, capacitor-to-GND) provide flexibility for diverse processor boot sequences without redesign.
Integrated MR pull-up	90 kΩ internal resistor eliminates discrete component requirement when manual reset is unused, simplifying layout and reducing cost.
Open-drain RESET output	Enables voltage-level translation and wired-OR reset bus configurations, supporting mixed-voltage system architectures.

Applications

Microcontroller Power-On Reset	Battery-Powered Portable Devices
Use Scenario: Ensuring deterministic startup of ARM Cortex-M or RISC-V microcontrollers after cold power application or brownout recovery. IC Role / Device Role / Timing Role: Monitors 1.2 V core rail and asserts open-drain RESET until voltage stabilizes above 1.12 V and delay expires-guaranteeing processor remains held in reset until supply is valid. Use Value: Prevents erratic execution or flash corruption during unstable power ramp-up, leveraging 0.5% threshold accuracy and 20 ms default delay for robust initialization.	Use Scenario: Maintaining reliable supervision in compact, long-life consumer electronics such as wireless earbuds or smart watches. IC Role / Device Role / Timing Role: Provides low-power voltage monitoring and reset generation for 1.2 V SoC cores, with CT pin configured for 100 ms delay to accommodate slow Li-ion battery wake-up transients. Use Value: Achieves multi-year operation on coin-cell batteries due to 2.4 μA IDD, while open-drain output interfaces cleanly with 3.3 V MCU reset inputs via 100 kΩ pull-up.
FPGA Configuration Integrity	Industrial Control System Monitoring
Use Scenario: Validating 1.2 V FPGA core voltage before configuration bitstream loading to prevent partial or corrupted configuration. IC Role / Device Role / Timing Role: Asserts RESET to FPGA's PROGRAM_B pin until 1.2 V rail exceeds 1.12 V with hysteresis and completes 1.25 ms minimum delay-synchronizing power-good with configuration start. Use Value: Eliminates need for external RC timing networks; programmable CT pin allows precise alignment with FPGA vendor's recommended power-up sequencing window.	Use Scenario: Supervising 1.2 V I/O or auxiliary rails in programmable logic controllers (PLCs) operating in harsh environments with wide thermal swings. IC Role / Device Role / Timing Role: Delivers guaranteed reset assertion over −40°C to 125°C junction temperature, using SOT-23-6 package with 180.9°C/W θJA for passive thermal management. Use Value: Ensures system reliability without active cooling, supported by 0.5% VIT accuracy maintained across full temperature range and robust ESD protection (±2000 V HBM).

Microcontroller Power-On Reset

Battery-Powered Portable Devices

Use Scenario: Ensuring deterministic startup of ARM Cortex-M or RISC-V microcontrollers after cold power application or brownout recovery.

IC Role / Device Role / Timing Role: Monitors 1.2 V core rail and asserts open-drain RESET until voltage stabilizes above 1.12 V and delay expires-guaranteeing processor remains held in reset until supply is valid.

Use Value: Prevents erratic execution or flash corruption during unstable power ramp-up, leveraging 0.5% threshold accuracy and 20 ms default delay for robust initialization.

Use Scenario: Maintaining reliable supervision in compact, long-life consumer electronics such as wireless earbuds or smart watches.

IC Role / Device Role / Timing Role: Provides low-power voltage monitoring and reset generation for 1.2 V SoC cores, with CT pin configured for 100 ms delay to accommodate slow Li-ion battery wake-up transients.

Use Value: Achieves multi-year operation on coin-cell batteries due to 2.4 μA IDD, while open-drain output interfaces cleanly with 3.3 V MCU reset inputs via 100 kΩ pull-up.

FPGA Configuration Integrity

Industrial Control System Monitoring

Use Scenario: Validating 1.2 V FPGA core voltage before configuration bitstream loading to prevent partial or corrupted configuration.

IC Role / Device Role / Timing Role: Asserts RESET to FPGA's PROGRAM_B pin until 1.2 V rail exceeds 1.12 V with hysteresis and completes 1.25 ms minimum delay-synchronizing power-good with configuration start.

Use Value: Eliminates need for external RC timing networks; programmable CT pin allows precise alignment with FPGA vendor's recommended power-up sequencing window.

Use Scenario: Supervising 1.2 V I/O or auxiliary rails in programmable logic controllers (PLCs) operating in harsh environments with wide thermal swings.

IC Role / Device Role / Timing Role: Delivers guaranteed reset assertion over −40°C to 125°C junction temperature, using SOT-23-6 package with 180.9°C/W θJA for passive thermal management.

Use Value: Ensures system reliability without active cooling, supported by 0.5% VIT accuracy maintained across full temperature range and robust ESD protection (±2000 V HBM).

Equivalent & Alternatives

The following parts are listed as comparable options for similar supervisory circuit applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS3808G12DBVR	Same silicon, identical electrical specs and pinout; differs only in tape-and-reel packaging (3000 pcs vs. 250 pcs) and RoHS marking (G4 suffix denotes green/lead-free compliance).	No functional difference; suitable for identical use cases including microcontroller reset and battery-powered supervision.	Select TPS3808G12DBVRG4 for RoHS-compliant production requiring TI's standard green packaging and traceability.
MAX6326UT12+T	Fixed 1.2 V threshold (1.14 V typ), 1.6 μA IDD, 200 ms fixed delay, SOT-23-5 package - lacks CT programmability and MR input.	Applicable where fixed delay suffices and manual reset is unnecessary; smaller footprint but less flexible timing control.	Choose MAX6326UT12+T only when design constraints mandate 5-pin SOT-23 and eliminate need for adjustable delay or MR functionality.

Compared with TPS3808G12DBVRG4, the TPS3808G12DBVR offers identical performance in a different reel format, while the MAX6326UT12+T trades programmability and MR support for lower quiescent current and reduced pin count-making it viable only in fixed-timing, space-constrained applications where flexibility is secondary.

Availability

TPS3808G12DBVRG4 is available at Aetrix Electronics and suitable for microcontroller power-on reset, battery-powered portable devices, FPGA configuration integrity, and industrial control system monitoring requiring stable component supply and long-term lifecycle support.

Supply support for TPS3808G12DBVRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in power management, signal chain, and microcontrollers.

The TPS3808 family is engineered for ultra-low-power voltage supervision in space- and energy-constrained systems, targeting portable, automotive, and industrial applications demanding precision reset timing and extended temperature operation.

FAQ

What is the exact threshold voltage of the TPS3808G12DBVRG4 and how accurate is it?

The TPS3808G12DBVRG4 has a nominal threshold voltage (VIT) of 1.12 V, with ±0.5% accuracy over the full operating temperature range of −40°C to 125°C. This specification is verified per TI's SBVS050M datasheet Section 5 and Electrical Characteristics Table 7.5, ensuring consistent reset activation for 1.2 V rails without calibration or trimming.

Can the TPS3808G12DBVRG4 be used to monitor voltages other than 1.2 V?

No-the TPS3808G12DBVRG4 is factory-trimmed specifically for 1.2 V rail supervision with a fixed 1.12 V threshold. To monitor other voltages, select alternate variants like TPS3808G33 (3.07 V) or TPS3808G01 (adjustable down to 0.405 V). Using TPS3808G12DBVRG4 outside its designated 1.2 V application risks incorrect reset timing or failure to assert.

How is the reset delay time configured on the TPS3808G12DBVRG4?

The TPS3808G12DBVRG4 supports three delay configurations via the CT pin: leaving CT open yields 20 ms, connecting CT to VDD through a 40–200 kΩ resistor gives 300 ms, and connecting CT to GND via a ≥100 pF capacitor enables user-programmable delays from 1.25 ms to 10 s. The delay is generated by an internal 220 nA current source charging the external capacitor to 1.23 V.

Does the TPS3808G12DBVRG4 require an external pull-up resistor on the RESET pin?

Yes-the TPS3808G12DBVRG4 features an open-drain RESET output and requires an external pull-up resistor (10 kΩ to 1 MΩ) to define the logic-high voltage level. This resistor also enables level-shifting: pulling RESET to 3.3 V or 5 V allows interfacing with processors operating at higher voltages than the TPS3808G12DBVRG4's VDD supply.

What package type and dimensions does the TPS3808G12DBVRG4 use?

The TPS3808G12DBVRG4 uses the SOT-23-6 (DBV) package with nominal body dimensions of 2.90 mm × 1.60 mm and 0.95 mm height. It features gull-wing leads, matte tin (NIPDAU) lead finish, RoHS compliance, and MSL Level-1 rating-suitable for standard reflow assembly without moisture sensitivity concerns.

TPS3808G12DBVRG4 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: SOT-23-6

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: Simple Reset/Power-On Reset

Number of Voltages Monitored:: 1

Voltage - Threshold:: 1.12V

Output:: Open Drain or Open Collector

Reset:: Active Low

Reset Timeout:: Adjustable/Selectable

Operating Temperature:: -40°C ~ 125°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: SOT-23-6

TPS3808G12DBVRG4 FAQ

1.How can I place an order for TPS3808G12DBVRG4 through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS3808G12DBVRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS3808G12DBVRG4 reliable?

The price and inventory of TPS3808G12DBVRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3808G12DBVRG4 is usually 5 days.

3.What payment methods are accepted for TPS3808G12DBVRG4?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3808G12DBVRG4 transactions.

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4.How is shipping managed for TPS3808G12DBVRG4?

TPS3808G12DBVRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS3808G12DBVRG4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS3808G12DBVRG4?

For technical support, including TPS3808G12DBVRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3808G12DBVRG4 requirements.

6.How does Aetrix verify that TPS3808G12DBVRG4 is sourced from the original manufacturer or authorized distributors?

All TPS3808G12DBVRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3808G12DBVRG4 meets industry standards.

7.What is the process for return or replacement of TPS3808G12DBVRG4?

All TPS3808G12DBVRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS3808G12DBVRG4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS3808G12DBVRG4 part is unused and in its original packaging.

Return procedure for TPS3808G12DBVRG4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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