Texas Instruments TPS3808G25DRVRG4

Overview

TPS3808G25DRVRG4 from Texas Instruments is a low-quiescent-current, programmable-delay supervisory circuit designed to monitor 2.5-V system rails and assert an open-drain RESET signal upon undervoltage or manual reset. It delivers 2.33-V threshold accuracy (±0.5% typical), 20-ms to 10-s user-adjustable delay, 2.4-μA typical supply current, and operates across –40°C to 125°C for use in battery-powered microcontroller power sequencing.

For engineers reviewing the TPS3808G25DRVRG4 datasheet, TPS3808G25DRVRG4 pinout, TPS3808G25DRVRG4 application, or TPS3808G25DRVRG4 equivalent, key selection criteria include threshold accuracy at 2.5-V rails, CT-pin programmable delay configuration, SOT-23/WSON package compatibility, open-drain RESET drive capability up to 6.5 V, and MR input logic interface with internal 90-kΩ pull-up.

Technical Context

The TPS3808G25DRVRG4 implements a precision voltage comparator with 0.5% threshold accuracy for VIT ≤ 3.3 V, using an internal reference to monitor SENSE voltage against a fixed 2.33-V trip point. Its reset timing is controlled by an on-chip 220-nA current source charging an external capacitor on the CT pin, enabling delay periods from 1.25 ms to 10 s.

It features dual assertion triggers: SENSE voltage drop below 2.33 V or MR pin driven low (≤0.3×VDD), both forcing an open-drain RESET output into low-impedance state. RESET remains asserted for the full delay period after both conditions clear, with built-in hysteresis (1–2.5% of VIT) preventing chatter during threshold transitions.

Key Specifications

Pinout & Package

TPS3808G25DRVRG4 is packaged in a 6-pin WSON (DRV) with 2.00 mm × 2.00 mm body size and exposed thermal pad. The pinout is validated per TI SBVS050M Rev M (March 2023).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar supervisory circuit applications.

Compared with TPS3808G25DRVRG4, the SOT-23 variant offers mechanical compatibility with legacy footprints but larger footprint, while the MAX6326 provides lower quiescent current at the cost of design flexibility-making TPS3808G25DRVRG4 optimal for applications requiring field-configurable delay and manual reset integration.

Availability

TPS3808G25DRVRG4 is available at Aetrix Electronics and suitable for battery-powered edge nodes, industrial PLC I/O modules, and FPGA configuration safety circuits requiring stable component supply with full lifecycle support.

Supply support for TPS3808G25DRVRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in power management, signal chain, and high-reliability ICs.

The TPS3808 family was designed specifically for ultra-low-power, high-accuracy voltage supervision in portable, automotive, and industrial systems where long battery life and precise reset timing are critical.

FAQ

What is the exact threshold voltage and accuracy of TPS3808G25DRVRG4?

The TPS3808G25DRVRG4 has a nominal threshold voltage of 2.33 V with ±0.5% typical accuracy over –40°C to 125°C for V_IT ≤ 3.3 V. This specification is confirmed in Section 5 (Device Voltage Thresholds) and Section 7.5 (Electrical Characteristics) of the TI SBVS050M datasheet. The 2.33-V value corresponds precisely to monitoring a 2.5-V rail with 7% headroom, ensuring robust immunity to ripple and noise.

How do I configure the reset delay time for TPS3808G25DRVRG4?

The reset delay of TPS3808G25DRVRG4 is configured via the CT pin: leave CT open for 20 ms, tie CT to VDD through a 40–200-kΩ resistor for 300 ms, or connect CT to GND via a capacitor ≥100 pF for user-defined delays from 1.25 ms to 10 s. Equation 1 in Section 8.3.2 of the datasheet gives CT (nF) = (t_D – 0.5) × 10³, validated for all operating temperatures.

Does TPS3808G25DRVRG4 support manual reset functionality?

Yes, TPS3808G25DRVRG4 includes a dedicated MR (manual reset) input (Pin 3) that asserts RESET when driven to logic low (≤0.3×VDD). The MR pin features an internal 90-kΩ pull-up to VDD, allowing it to be left unconnected if manual reset is unused. This function is fully documented in Table 6-1 (Pin Functions) and Section 8.3.3 of the TI SBVS050M datasheet.

What package type and dimensions does TPS3808G25DRVRG4 use?

TPS3808G25DRVRG4 uses the DRV package: a 6-pin WSON with 2.00 mm × 2.00 mm body size and exposed thermal pad. Mechanical drawings and land patterns are specified in Section 13 (Mechanical, Packaging, and Orderable Information) of the TI SBVS050M datasheet. This package supports fine-pitch reflow and enhanced thermal performance versus SOT-23 alternatives.

Can TPS3808G25DRVRG4 drive a 5-V microcontroller RESET input?

Yes, the open-drain RESET output of TPS3808G25DRVRG4 is rated for 6.5-V absolute maximum voltage, allowing direct interface to 5-V logic domains. A pull-up resistor (10 kΩ–1 MΩ) to the 5-V supply is required, as specified in Section 6 (Pin Configuration and Functions) and Figure 9-1 (Typical Application) of the TI SBVS050M datasheet.