Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Texas Instruments TPS3840DL37DBVRQ1

Name: TPS3840DL37DBVRQ1
Brand: Texas Instruments
SKU: TPS3840DL37DBVRQ1
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: TPS3840DL37DBVRQ1

Manufacturer:: Texas Instruments

Category:: Supervisors

Package:: SC-74A, SOT-753

Datasheet:: TPS3840DL37DBVRQ1.pdf

Description:: IC SUPERVISOR 1 CHANNEL SOT23-5

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:330

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

TPS3840DL37DBVRQ1 from Texas Instruments is an automotive-grade nano-I_Q voltage supervisor with open-drain active-low RESET output, 3.7 V fixed negative threshold (V_IT−), ±1.5% accuracy over −40°C to +125°C, 350 nA typical supply current, and programmable reset delay up to 6.2 s via external capacitor on CT pin - used for reliable power-on reset in automotive infotainment and ADAS domain controllers.

For engineers reviewing the TPS3840DL37DBVRQ1 datasheet, TPS3840DL37DBVRQ1 pinout, TPS3840DL37DBVRQ1 application, or TPS3840DL37DBVRQ1 equivalent, this page delivers verified technical context, exact pin functions, real-world automotive use cases, and validated alternative options for AEC-Q100-compliant system design.

Technical Context

The TPS3840DL37DBVRQ1 implements a precision bandgap-referenced comparator with built-in hysteresis (100 mV typical for 3.7 V threshold) and glitch-immune detection logic. Its CT pin connects to an internal 500 kΩ resistor (typical) enabling RC-based reset timing, while MR provides asynchronous manual reset assertion independent of VDD monitoring.

VDD monitoring operates across 1.5 V–10 V with propagation delay t_{P_HL} ≤30 µs and startup delay t_STRT ≤350 µs. The open-drain RESET output supports flexible pull-up configurations and exhibits <90 nA leakage at 5.5 V, enabling low-power battery-backed systems.

Key Specifications

Parameter	Value and Actual Design Meaning
V_IT− Threshold	3.7 V ±1.5% (max) - precise brownout detection point for 3.3 V rail supervision with hysteresis
Supply Current (I_DD)	350 nA (typ), 700 nA (max) - enables multi-year operation in always-on automotive modules
Reset Output Type	Open-drain active-low - allows wired-OR configuration and level-shifting via external pull-up
Reset Delay Range	50 µs (CT floating) to 6.2 s (10 µF to GND) - configurable power sequencing timing without firmware
Startup Delay (t_STRT)	≤350 µs - ensures fast, deterministic release after VDD rise above V_IT+
AEC-Q100 Grade	Grade 1 (−40°C to +125°C ambient) - qualified for engine bay and cockpit electronics
ESD Rating	HBM ±2000 V, CDM ±750 V - robust against assembly and field handling stress

Pinout & Package

SOT-23 (DBV) package: 5-pin, 2.90 mm × 1.60 mm body size, surface-mount, lead-free and RoHS compliant.

Pin/Terminal	Circuit Role	Design Meaning
1 - RESET	Open-drain active-low output	Asserts low during VDD undervoltage or MR activation; requires external pull-up for logic-high state
2 - VDD	Power input and monitored rail	Supplies internal circuitry and serves as the voltage being supervised (1.5 V–10 V range)
3 - GND	Analog and digital ground reference	Common return path for VDD, MR, CT, and RESET; must be low-impedance for accurate threshold sensing
4 - MR	Active-low manual reset input	Pull to ≤600 mV to force RESET assertion; floats high internally (100 kΩ pull-up) when unused
5 - CT	Capacitor time-delay programming node	Connects to internal ~500 kΩ resistor; sets t_D via external capacitor (0–10 µF) to GND

Key Features

Feature	Design Value
Nano quiescent current	350 nA typ enables >10-year battery life in always-on vehicle telematics modules
Programmable reset delay	RC-timed delay (50 µs–6.2 s) eliminates need for external timers or microcontroller intervention
High-accuracy threshold	±1.5% max V_IT− tolerance ensures consistent brownout behavior across temperature and voltage
Glitch immunity	10 µs minimum pulse rejection at 5% V_IT− overdrive prevents false resets from EMI or transients
Automotive qualification	AEC-Q100 Grade 1, HBM/CDM ESD rated - meets functional safety readiness for ASIL-B systems

Applications

Automotive Head Unit Power Sequencing	ADAS Domain Controller Supervision
Use Scenario: Ensures clean boot sequence for dual-core SoC and display driver ICs after ignition power-up. IC Role / Device Role / Timing Role: Monitors 3.3 V VCORE rail and asserts open-drain RESET until stable, then holds delay before releasing. Use Value: Prevents firmware lockup by guaranteeing ≥50 µs minimum reset pulse width even with fast-rising VDD.	Use Scenario: Supervises 5 V and 1.8 V rails in radar/Ethernet gateway modules exposed to load-dump transients. IC Role / Device Role / Timing Role: Detects VDD sag below 3.7 V and initiates controlled shutdown via MCU interrupt on RESET deassertion. Use Value: 100 mV hysteresis avoids chatter during slow VDD recovery; 350 nA I_DD minimizes standby drain.
Telematics Control Unit (TCU) Watchdog	Driver Monitoring System (DMS) Camera Module
Use Scenario: Provides hardware-enforced reset if main processor fails to toggle MR within watchdog window. IC Role / Device Role / Timing Role: MR pin driven by MCU GPIO; CT capacitor sets 200 ms timeout for fault detection. Use Value: Eliminates software-only watchdog limitations - survives MCU lockup, flash corruption, or clock failure.	Use Scenario: Powers camera sensor and ISP in driver-facing module with strict low-power requirements. IC Role / Device Role / Timing Role: Supervises 1.8 V I/O rail; RESET output controls enable pin of LDO supplying image sensor. Use Value: 3.7 V threshold matches 1.8 V LDO dropout margin; 700 nA max I_DD preserves battery runtime.

Automotive Head Unit Power Sequencing

ADAS Domain Controller Supervision

Use Scenario: Ensures clean boot sequence for dual-core SoC and display driver ICs after ignition power-up.

IC Role / Device Role / Timing Role: Monitors 3.3 V VCORE rail and asserts open-drain RESET until stable, then holds delay before releasing.

Use Value: Prevents firmware lockup by guaranteeing ≥50 µs minimum reset pulse width even with fast-rising VDD.

Use Scenario: Supervises 5 V and 1.8 V rails in radar/Ethernet gateway modules exposed to load-dump transients.

IC Role / Device Role / Timing Role: Detects VDD sag below 3.7 V and initiates controlled shutdown via MCU interrupt on RESET deassertion.

Use Value: 100 mV hysteresis avoids chatter during slow VDD recovery; 350 nA I_DD minimizes standby drain.

Telematics Control Unit (TCU) Watchdog

Driver Monitoring System (DMS) Camera Module

Use Scenario: Provides hardware-enforced reset if main processor fails to toggle MR within watchdog window.

IC Role / Device Role / Timing Role: MR pin driven by MCU GPIO; CT capacitor sets 200 ms timeout for fault detection.

Use Value: Eliminates software-only watchdog limitations - survives MCU lockup, flash corruption, or clock failure.

Use Scenario: Powers camera sensor and ISP in driver-facing module with strict low-power requirements.

IC Role / Device Role / Timing Role: Supervises 1.8 V I/O rail; RESET output controls enable pin of LDO supplying image sensor.

Use Value: 3.7 V threshold matches 1.8 V LDO dropout margin; 700 nA max I_DD preserves battery runtime.

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage supervisor applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS3840PL37DBVRQ1	Push-pull active-low RESET output; no external pull-up required	Better suited for noise-sensitive environments where open-drain leakage could cause false logic states	Select when board layout lacks space for pull-up resistor or when driving capacitive loads directly
MAX6373TATA+T	Fixed 3.63 V threshold, 1.2 µA I_DD, SOT-23-5, non-automotive grade	Lacks AEC-Q100 qualification and nano-I_Q; higher supply current limits battery life	Acceptable for cost-sensitive non-automotive industrial designs where Grade 1 temp range is not mandatory

Compared with TPS3840PL37DBVRQ1, the TPS3840DL37DBVRQ1 offers superior noise immunity via external pull-up control but requires PCB routing for that resistor; versus MAX6373TATA+T, it delivers 3.4× lower quiescent current and full automotive qualification - critical for OEM production programs.

Availability

TPS3840DL37DBVRQ1 is available at Aetrix Electronics and suitable for automotive head units, ADAS domain controllers, and telematics control units requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.

Supply support for TPS3840DL37DBVRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of automotive qualification expertise and broad manufacturing scale.

The TPS3840-Q1 product line was designed specifically for AEC-Q100 Grade 1 automotive power-supply monitoring - delivering ultra-low I_DD, high-accuracy thresholds, and programmable timing in minimal SOT-23 footprint.

FAQ

What is the exact threshold voltage of the TPS3840DL37DBVRQ1?

The TPS3840DL37DBVRQ1 has a factory-set negative-going input threshold (V_IT−) of 3.7 V, with guaranteed accuracy of ±1.5% over −40°C to +125°C ambient temperature. This value is laser-trimmed during production and does not require external resistor networks - making it ideal for stable 3.3 V rail supervision in automotive ECUs where voltage tolerance margins are tight.

How do I configure the reset delay time for the TPS3840DL37DBVRQ1?

Reset delay (t_D) on the TPS3840DL37DBVRQ1 is set by connecting a capacitor between the CT pin (Pin 5) and GND. With no capacitor, t_D = 50 µs (included in startup delay). Using a 100 nF capacitor yields ~62 ms; 1 µF gives ~619 ms; and 10 µF achieves the maximum 6.2 s delay. The internal CT resistor is ~500 kΩ, and Equation 2 from the datasheet applies for precise calculation.

Can the TPS3840DL37DBVRQ1 be used with a 5 V supply rail?

Yes - the TPS3840DL37DBVRQ1 supports VDD from 1.5 V to 10 V, so it fully covers 5 V operation. When supervising a 5 V rail, its 3.7 V threshold provides 1.3 V dropout margin, aligning with common LDO specifications. The device maintains ±1.5% V_IT− accuracy and 350 nA I_DD across this range, with RESET output compatible via appropriate pull-up voltage (e.g., 5 V or 3.3 V).

What is the function of the MR pin on the TPS3840DL37DBVRQ1?

The MR (Manual Reset) pin on the TPS3840DL37DBVRQ1 is an active-low input that forces RESET assertion regardless of VDD level. Pulling MR ≤600 mV triggers immediate reset; releasing it (floating or >0.7×VDD) starts the t_D timer before RESET deassertion. An internal 100 kΩ pull-up eliminates need for external bias - simplifying design for watchdog or button-initiated reset functions.

Is the TPS3840DL37DBVRQ1 pin-compatible with other TPS3840-Q1 variants?

Yes - all TPS3840-Q1 devices, including TPS3840DL37DBVRQ1, share identical SOT-23 (DBV) 5-pin packaging and pinout: Pin 1 = RESET, Pin 2 = VDD, Pin 3 = GND, Pin 4 = MR, Pin 5 = CT. This allows direct substitution between DL (open-drain), PL (push-pull low), and PH (push-pull high) versions when board layout and system logic accommodate the output topology change.

TPS3840DL37DBVRQ1 Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: SC-74A, SOT-753

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Simple Reset/Power-On Reset

Number of Voltages Monitored:: 1

Voltage - Threshold:: 3.7V

Output:: Open Drain or Open Collector

Reset:: Active Low

Reset Timeout:: 619ms Typical

Operating Temperature:: -40°C ~ 125°C (TJ)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: SOT-23-5

TPS3840DL37DBVRQ1 FAQ

1.How can I place an order for TPS3840DL37DBVRQ1 through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS3840DL37DBVRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS3840DL37DBVRQ1 reliable?

The price and inventory of TPS3840DL37DBVRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3840DL37DBVRQ1 is usually 5 days.

3.What payment methods are accepted for TPS3840DL37DBVRQ1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3840DL37DBVRQ1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TPS3840DL37DBVRQ1?

TPS3840DL37DBVRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS3840DL37DBVRQ1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS3840DL37DBVRQ1?

For technical support, including TPS3840DL37DBVRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3840DL37DBVRQ1 requirements.

6.How does Aetrix verify that TPS3840DL37DBVRQ1 is sourced from the original manufacturer or authorized distributors?

All TPS3840DL37DBVRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3840DL37DBVRQ1 meets industry standards.

7.What is the process for return or replacement of TPS3840DL37DBVRQ1?

All TPS3840DL37DBVRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS3840DL37DBVRQ1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS3840DL37DBVRQ1 part is unused and in its original packaging.

Return procedure for TPS3840DL37DBVRQ1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…