Texas Instruments TPS3850H33DRCR
- Part No.:
- TPS3850H33DRCR
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TPS3850H33DRCR.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 10VSON
- Quantity:
- Payment:

- Shipping:

Inventory:3,182
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS3850H33DRCR from Texas Instruments is a precision voltage supervisor IC with integrated programmable window watchdog timer, designed for high-reliability power-rail monitoring in microcontroller and SoC systems. It delivers 0.8% threshold accuracy over –40°C to +125°C, supports 1.6 V–6.5 V supply range, features open-drain RESET and WDO outputs, and enables ±4% or ±7% fault windows on rails from 0.9 V to 5.0 V - used in ultrasound scanners and active antenna mMIMO systems.
For engineers reviewing the TPS3850H33DRCR datasheet, TPS3850H33DRCR pinout, TPS3850H33DRCR application, or TPS3850H33DRCR equivalent, key selection criteria include its factory-programmed vs capacitor-programmable reset/watchdog timing, dual-threshold hysteresis (0.5%), 10 µA typical supply current, and 3-mm × 3-mm VSON-10 package compatibility with space-constrained industrial and medical electronics.
Technical Context
The TPS3850H33DRCR implements a dual-comparator window architecture on the SENSE pin with independent overvoltage (VIT+(OV)) and undervoltage (VIT–(UV)) thresholds, each achieving ±0.8% accuracy across temperature. Its state-machine-controlled timing engine supports both factory-programmed default delays (9.5% accuracy) and external capacitor programming for RESET (tRST = 703 µs–3.22 s) and watchdog upper/lower boundaries (tWDU/tWDL).
Watchdog operation uses a dedicated WDI input with strict timing windows: valid transitions must occur between tWDL(max) and tWDU(min), with ratios selectable via SET0/SET1 as 1:8, 1:2, or 3:4 - enabling precise fault classification (early/late/valid). The device disables watchdog via logic-level SET pin configuration, not just pull-up resistors, and maintains functional isolation between RESET and WDO assertion states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 1.6 V to 6.5 V - powers supervisory circuitry across wide-input industrial and automotive rails without external regulators. |
| Threshold Accuracy | ±0.8% over –40°C to +125°C - ensures reliable reset assertion before microcontroller VDD min/max limits are violated. |
| Supply Current | 10 µA typical - enables always-on supervision in battery-backed or ultra-low-power systems without significant load impact. |
| Reset Delay Range | 703 µs to 3.22 s (capacitor-programmable) - accommodates diverse boot sequences from fast MCU startup to complex FPGA configuration. |
| Watchdog Window Ratio | Selectable 1:8, 1:2, or 3:4 via SET0/SET1 - provides configurable fault discrimination granularity for deterministic system recovery. |
| Hysteresis | 0.5% - prevents chatter during slow-rising/falling rail transitions and improves noise immunity in electrically noisy environments. |
| Package | 3.00 mm × 3.00 mm VSON-10 - surface-mount footprint compatible with automated assembly and thermal pad grounding for stable junction temperature control. |
Pinout & Package
TPS3850H33DRCR is housed in a 3.00-mm × 3.00-mm, 10-pin VSON package with exposed thermal pad internally connected to GND. The package supports reflow soldering per JEDEC J-STD-020 and requires thermal pad connection to a large-area ground plane for optimal thermal performance (RθJB = 26.1°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Pin 1) | Power supply input | Accepts 1.6–6.5 V; requires 0.1-µF bypass capacitor for noise suppression in high-dV/dt environments. |
| CWD (Pin 2) | Watchdog timeout programming input | Configures tWDU/tWDL via capacitor-to-GND or 10-kΩ pullup; determines upper watchdog boundary when combined with SET pins. |
| SET0 (Pin 3) | Watchdog mode select input | Logic-controlled selection of watchdog ratio (1:8/1:2/3:4) and disable function; requires ≥500 µs setup after change. |
| CRST (Pin 4) | Reset timeout programming input | Defines tRST via capacitor-to-GND (703 µs–3.22 s) or 10-kΩ pullup (8.5–11.5 ms); evaluated every SENSE window entry. |
| GND (Pin 5) | Ground reference | Common return path for all analog and digital functions; thermal pad must be soldered to PCB ground plane. |
| SET1 (Pin 6) | Watchdog mode select input | Paired with SET0 to configure watchdog enable/disable and ratio; logic levels defined by VIH/VIL thresholds (0.8×VDD / 0.25 V). |
| WDI (Pin 7) | Watchdog trigger input | Falling-edge sensitive; must transition within tWDL–tWDU window to prevent WDO assertion; ignored when RESET or WDO is low. |
| WDO (Pin 8) | Watchdog output | Open-drain output asserting low for tRST duration upon timeout; only active when RESET is high - enables cascaded fault handling. |
| RESET (Pin 9) | Supervisor reset output | Open-drain output asserting low when SENSE is outside VIT+(OV)/VIT–(UV); holds low for programmed tRST after rail recovery. |
| SENSE (Pin 10) | Monitored voltage input | High-impedance input (ISENSE ≤ 2.5 µA) for direct connection to 0.9–5.0 V rails; supports ±4% or ±7% fault windows with 0.5% hysteresis. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable window watchdog | Enables fault classification (early/late/valid) via independently adjustable tWDL and tWDU boundaries using CWD and SET pins. |
| Factory-programmed timing | Provides 9.5% accurate default RESET delay and watchdog timeouts - eliminates external components for standard configurations. |
| 0.5% hysteresis | Prevents oscillatory reset behavior during rail ramp-up/down and improves immunity to transient noise on SENSE line. |
| Watchdog disable via logic | SET0/SET1 configuration disables watchdog without requiring external pull resistors - simplifies development and debug workflows. |
| Wide SENSE voltage support | Monitors rails from 0.9 V to 5.0 V with ±4% or ±7% fault windows - covers core, I/O, and analog supply domains in modern SoCs. |
Applications
| Ultrasound Scanner | Storage Area Network |
|---|---|
Use Scenario: Real-time beamforming and signal processing in portable and cart-based ultrasound systems requiring fail-safe power sequencing. IC Role / Device Role / Timing Role: Monitors 1.2-V VCORE and 1.8-V I/O rails while enforcing deterministic watchdog timeout windows to detect firmware hangs during image acquisition. Use Value: Prevents corrupted scan data or unsafe transducer activation by asserting RESET before rail violations exceed MCU tolerance limits (±0.8% accuracy at 125°C). |
Use Scenario: High-availability storage controllers with redundant power supplies and hot-swappable drives demanding continuous health monitoring. IC Role / Device Role / Timing Role: Supervises 3.3-V and 5-V backplane rails and triggers WDO upon missed WDI pulses to initiate controller failover before data corruption occurs. Use Value: Enables sub-millisecond fault detection via 1:8 watchdog ratio and 50-ns WDI pulse validation - critical for maintaining RAID integrity under transient load shifts. |
| Active Antenna System mMIMO | Robot Servo Drive |
Use Scenario: 64+ element phased-array base stations where RF front-end power rails must remain within tight tolerances during beam steering. IC Role / Device Role / Timing Role: Provides over/undervoltage protection on 0.9-V bias rails with ±4% fault windows and 0.5% hysteresis to avoid false resets during rapid thermal cycling. Use Value: Ensures uninterrupted beam alignment by maintaining 0.8% threshold accuracy across –40°C to +125°C - eliminating need for recalibration in outdoor deployments. |
Use Scenario: Precision motion control in collaborative robots where servo amplifier faults must trigger immediate safe-stop without software intervention. IC Role / Device Role / Timing Role: Supervises 24-V motor drive rails and 3.3-V controller rails simultaneously; uses WDO to signal hardware-level emergency stop to FPGA safety logic. Use Value: Guarantees <100-ms total fault response (SENSE propagation + tWDL + tRST) - meets ISO 13849 PLd safety requirements for Category 3 architectures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor with watchdog timer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3851H33DRCR | Includes integrated power-good (PG) output and higher ESD rating (±6 kV HBM), but lacks factory-programmed watchdog timing options. | Better suited for systems requiring explicit power-status signaling alongside supervision, but requires external timing components for watchdog configuration. | Select TPS3851H33DRCR if PG output is needed and capacitor-based watchdog tuning is acceptable; otherwise retain TPS3850H33DRCR for plug-and-play timing defaults. |
| MAX6373KA29+T | Fixed 2.93-V threshold, no window watchdog, 14-pin TSSOP package, 15 µA supply current, ±1.5% accuracy over –40°C to +85°C. | Applicable only for single-threshold 2.93-V rail monitoring without fault classification capability - insufficient for multi-rail or safety-critical window detection. | Choose MAX6373KA29+T only for cost-sensitive, non-safety applications with fixed 2.93-V rails and no watchdog requirement; TPS3850H33DRCR remains superior for window supervision and extended temperature range. |
Compared with TPS3851H33DRCR and MAX6373KA29+T, the TPS3850H33DRCR uniquely combines factory-programmed watchdog timing, 0.8% accuracy across full industrial temperature range, and true window supervision - making it the only option supporting deterministic fault classification in AAS and robotics applications without design compromises.
Availability
TPS3850H33DRCR is available at Aetrix Electronics and suitable for ultrasound scanner, storage area network, and active antenna mMIMO applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS3850H33DRCR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 50 years of innovation in high-reliability industrial and automotive electronics.
The TPS3850H33DRCR belongs to TI's precision voltage supervisor product line, engineered specifically for mission-critical systems requiring simultaneous overvoltage, undervoltage, and window watchdog monitoring with minimal external components.
FAQ
What is the operating temperature range for the TPS3850H33DRCR?
The TPS3850H33DRCR operates across a junction temperature range of –40°C to +125°C, with all electrical specifications-including 0.8% threshold accuracy and 10 µA supply current-guaranteed over this full industrial range. This makes the TPS3850H33DRCR suitable for under-hood automotive modules, outdoor telecom equipment, and industrial motor drives where ambient temperatures exceed 85°C.
How does the TPS3850H33DRCR implement window watchdog functionality?
The TPS3850H33DRCR implements window watchdog functionality through dedicated WDI input and WDO output, with lower (tWDL) and upper (tWDU) timing boundaries programmable via CWD capacitor and SET0/SET1 logic pins. Valid WDI falling edges must occur strictly between tWDL(max) and tWDU(min) to prevent WDO assertion - enabling classification of early, late, or valid transitions. The TPS3850H33DRCR supports ratios of 1:8, 1:2, and 3:4 for precise fault discrimination.
Can the TPS3850H33DRCR monitor multiple voltage rails simultaneously?
No, the TPS3850H33DRCR monitors only one voltage rail via its single SENSE pin. However, multiple TPS3850H33DRCR devices can be deployed in parallel to supervise different rails (e.g., VCORE, VI/O, analog supply) with independent reset and watchdog timing. Each TPS3850H33DRCR provides dedicated open-drain RESET and WDO outputs, allowing hierarchical fault handling in multi-rail systems without shared timing dependencies.
What are the factory-programmed timing options for the TPS3850H33DRCR?
The TPS3850H33DRCR offers factory-programmed RESET delay options of 170–230 ms (CRST = NC) or 8.5–11.5 ms (CRST = 10 kΩ to VDD), and watchdog timing options including tWDL/tWDU pairs of 19.1–25.9 ms / 46.8–63.3 ms (1:8 ratio), 680–920 ms / 1360–1840 ms (1:2 ratio), and 1.48–2.22 ms / 23.375–31.625 ms (3:4 ratio). These defaults eliminate external capacitors for standardized configurations while retaining programmability via CWD/CRST pins.
Does the TPS3850H33DRCR require external pull-up resistors on its outputs?
Yes, both RESET and WDO outputs are open-drain and require external pull-up resistors to VDD or appropriate logic rail. Recommended values range from 1 kΩ to 100 kΩ, selected based on VOL specification (≤0.4 V at 3 mA sink), capacitive loading, and leakage current (≤1 µA). For example, a 10-kΩ resistor ensures VOL ≤ 0.4 V while minimizing power draw - a key design consideration for the TPS3850H33DRCR's 10 µA typical supply current budget.
TPS3850H33DRCR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 3.3V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSON (3x3)
TPS3850H33DRCR FAQ
1.How can I place an order for TPS3850H33DRCR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3850H33DRCR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3850H33DRCR reliable?
The price and inventory of TPS3850H33DRCR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3850H33DRCR is usually 5 days.
3.What payment methods are accepted for TPS3850H33DRCR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3850H33DRCR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS3850H33DRCR?
TPS3850H33DRCR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS3850H33DRCR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3850H33DRCR?
For technical support, including TPS3850H33DRCR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3850H33DRCR requirements.
6.How does Aetrix verify that TPS3850H33DRCR is sourced from the original manufacturer or authorized distributors?
All TPS3850H33DRCR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3850H33DRCR meets industry standards.
7.What is the process for return or replacement of TPS3850H33DRCR?
All TPS3850H33DRCR units undergo pre-shipment inspection (PSI). If there is an issue with TPS3850H33DRCR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3850H33DRCR part is unused and in its original packaging.
Return procedure for TPS3850H33DRCR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS3850H33DRCR Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

