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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Texas Instruments TPS386596L33DGKT

Name: TPS386596L33DGKT
Brand: Texas Instruments
SKU: TPS386596L33DGKT
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: TPS386596L33DGKT

Manufacturer:: Texas Instruments

Category:: Supervisors

Package:: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)

Datasheet:: TPS386596L33DGKT.pdf

Description:: IC SUPERVISOR 4 CHANNEL 8VSSOP

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Product details

Overview

TPS386596L33DGKT from Texas Instruments is a quad-channel voltage supervisor IC that monitors four independent power rails-SENSE1 (fixed 2.90 V threshold for 3.3-V systems), and SENSE2–SENSE4 (adjustable down to 0.4 V via external resistor dividers)-and asserts an open-drain active-low RESET signal when any rail falls below its threshold. It features 0.25% typical threshold accuracy, 50-ms fixed reset delay, 7 µA typical quiescent current, and operates from 1.8 V to 6.5 V supply. It is used in FPGA, DSP, and multi-rail embedded systems requiring reliable power-on and brownout reset sequencing.

For engineers reviewing the TPS386596L33DGKT datasheet, TPS386596L33DGKT pinout, TPS386596L33DGKT application, or TPS386596L33DGKT equivalent, key selection considerations include its quad-supply monitoring capability, fixed vs. adjustable thresholds per channel, 50-ms reset timing consistency across temperature, low-quiescent-current operation for battery-sensitive designs, and compatibility with 1.8–6.5 V VDD domains.

Technical Context

The TPS386596L33DGKT implements four independent undervoltage comparators with built-in hysteresis (25–72 mV on SENSE1; 3.5–10 mV on SENSE2–4) and a logic-controlled reset state machine. Its RESET output deasserts only after all monitored rails exceed their respective thresholds *and* the MR input is high, followed by a precise 50-ms delay-guaranteed over –40°C to +125°C junction temperature.

Each SENSE input supports distinct voltage ranges: SENSE1 is factory-trimmed for 3.3-V nominal supplies (VIT1 = 2.90 V typ), while SENSE2–4 use internal 400-mV reference and external resistor dividers to set thresholds ≥0.4 V. The MR pin includes a 100-kΩ internal pullup and 50-ns deglitching, enabling robust manual reset initiation without external components.

Key Specifications

Parameter	Value and Actual Design Meaning
VDD Range	1.8 V to 6.5 V - supports wide-input systems including 3.3-V and 5-V domains without level-shifting.
SENSE1 Threshold	2.90 V (typ), ±25 mV (max hysteresis) - precisely monitors 3.3-V rails without external resistors.
SENSE2–4 Threshold	0.4 V minimum, set by external divider - enables monitoring of sub-1-V FPGA core rails (e.g., 1.2 V, 1.0 V, 0.85 V).
RESET Delay	50 ms (typ), 30–70 ms (min/max) - ensures stable post-reset system initialization before processor release.
Quiescent Current	7 µA (typ) at 3.3 V - enables long-term battery-backed operation in industrial and portable equipment.
Threshold Accuracy	±0.25% (typ) - guarantees tight trip-point tolerance across temperature and supply variations.
MR Input Logic	Active-low, 0.3×VDD max VIH, internal 100-kΩ pullup - simplifies interface to GPIOs or pushbutton switches.

Pinout & Package

TPS386596L33DGKT is housed in an 8-pin VSSOP (DGK) package measuring 5.00 mm × 3.00 mm, optimized for space-constrained PCB layouts in server, telecom, and FPGA carrier boards.

Pin/Terminal	Circuit Role	Design Meaning
1: SENSE4	Adjustable voltage monitor input	Monitors fourth rail (≥0.4 V) using external resistor divider; asserts RESET if voltage drops below VIT4.
2: SENSE3	Adjustable voltage monitor input	Monitors third rail (≥0.4 V); identical electrical behavior to SENSE4 with independent comparator.
3: SENSE2	Adjustable voltage monitor input	Monitors second rail (≥0.4 V); supports same precision and hysteresis as SENSE3/4.
4: SENSE1	Fixed-threshold voltage monitor input	Dedicated 3.3-V rail monitor (VIT1 = 2.90 V typ); requires no external components.
5: GND	Ground reference	Analog and digital ground return; must be low-impedance connection to minimize noise coupling into SENSE inputs.
6: RESET	Open-drain active-low reset output	Drives low during fault or MR assertion; requires external pullup (≥10 kΩ) to VDD or target logic rail.
7: MR	Active-low manual reset input	Asserts RESET immediately on logic low; includes 100-kΩ internal pullup and 50-ns deglitch filter.
8: VDD	Supply voltage input	Power source (1.8–6.5 V); requires 0.1-µF ceramic decoupling capacitor placed adjacent to pin.

Key Features

Feature	Design Value
Quad independent voltage monitoring	Four separate comparators enable simultaneous supervision of CPU, FPGA core, I/O, and auxiliary rails without shared timing constraints.
Fixed + adjustable threshold architecture	SENSE1 eliminates BOM cost and layout area for 3.3-V monitoring; SENSE2–4 provide design flexibility for custom rail voltages.
50-ms fixed reset delay	Guaranteed timing ensures deterministic release after fault clearance-no external RC timing components required.
7 µA typical quiescent current	Enables integration into always-on subsystems (e.g., watchdog circuits, battery-backed real-time clocks) without significant power penalty.
0.25% typical threshold accuracy	Reduces margining requirements in high-reliability applications such as telecom infrastructure and industrial controllers.

Applications

FPGA Power Sequencing	DSP/MCU System Reset
Use Scenario: Monitoring 1.2-V core, 3.3-V I/O, 1.0-V auxiliary, and 5-V supply rails in Xilinx or Intel FPGA-based systems. IC Role / Device Role / Timing Role: Quad supervisor asserting single RESET signal only after all rails stabilize above thresholds, enforcing strict power-up sequence compliance. Use Value: Prevents configuration corruption and latch-up by ensuring FPGA fabric, transceivers, and peripherals are fully powered before release from reset.	Use Scenario: Supervising dual-core DSP (e.g., C66x) with separate 1.5-V core, 3.3-V memory, 1.8-V peripheral, and 5-V analog supply rails. IC Role / Device Role / Timing Role: Centralized reset arbiter coordinating power-good status across heterogeneous voltage domains before releasing DSP reset pin. Use Value: Eliminates need for discrete supervisors per rail, reducing component count and improving timing correlation between reset events.
Industrial PLC Controller	Server Baseboard Management
Use Scenario: Monitoring isolated 24-V DC-DC outputs converted to 5-V, 3.3-V, 1.8-V, and 1.2-V rails in programmable logic controller backplanes. IC Role / Device Role / Timing Role: Fault-detection node triggering system-wide reset upon undervoltage on any safety-critical rail (e.g., 5-V isolation barrier supply). Use Value: Meets SIL-2 functional safety requirements by providing deterministic, low-latency response to power faults without software dependency.	Use Scenario: Supervising BMC (Baseboard Management Controller) power rails-including 3.3-V management, 1.8-V SoC I/O, 1.2-V CPU core, and 5-V fan control-in dual-socket server motherboards. IC Role / Device Role / Timing Role: Enables BMC-initiated graceful shutdown or forced reset via MR pin when thermal or voltage faults exceed policy thresholds. Use Value: Supports IPMI-compliant reset coordination between BMC and host processors without adding latency or complexity to reset tree.

FPGA Power Sequencing

DSP/MCU System Reset

Use Scenario: Monitoring 1.2-V core, 3.3-V I/O, 1.0-V auxiliary, and 5-V supply rails in Xilinx or Intel FPGA-based systems.

IC Role / Device Role / Timing Role: Quad supervisor asserting single RESET signal only after all rails stabilize above thresholds, enforcing strict power-up sequence compliance.

Use Value: Prevents configuration corruption and latch-up by ensuring FPGA fabric, transceivers, and peripherals are fully powered before release from reset.

Use Scenario: Supervising dual-core DSP (e.g., C66x) with separate 1.5-V core, 3.3-V memory, 1.8-V peripheral, and 5-V analog supply rails.

IC Role / Device Role / Timing Role: Centralized reset arbiter coordinating power-good status across heterogeneous voltage domains before releasing DSP reset pin.

Use Value: Eliminates need for discrete supervisors per rail, reducing component count and improving timing correlation between reset events.

Industrial PLC Controller

Server Baseboard Management

Use Scenario: Monitoring isolated 24-V DC-DC outputs converted to 5-V, 3.3-V, 1.8-V, and 1.2-V rails in programmable logic controller backplanes.

IC Role / Device Role / Timing Role: Fault-detection node triggering system-wide reset upon undervoltage on any safety-critical rail (e.g., 5-V isolation barrier supply).

Use Value: Meets SIL-2 functional safety requirements by providing deterministic, low-latency response to power faults without software dependency.

Use Scenario: Supervising BMC (Baseboard Management Controller) power rails-including 3.3-V management, 1.8-V SoC I/O, 1.2-V CPU core, and 5-V fan control-in dual-socket server motherboards.

IC Role / Device Role / Timing Role: Enables BMC-initiated graceful shutdown or forced reset via MR pin when thermal or voltage faults exceed policy thresholds.

Use Value: Supports IPMI-compliant reset coordination between BMC and host processors without adding latency or complexity to reset tree.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-voltage supervisor applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MAX6812HEUT+T	Triple supervisor (3 channels), fixed 3.08-V, 3.3-V, and 5.0-V thresholds; no adjustable inputs; 200-ms reset timeout.	Lacks fourth channel and adjustable thresholds-requires additional components to monitor sub-1-V rails or custom voltages.	Choose when only three standard rails require supervision and longer reset delay is acceptable.
ADM1266ACPZ	12-channel sequencer/supervisor with I²C interface, programmable delays, and fault logging; 32-pin LFCSP package.	Requires firmware configuration and adds communication overhead; suited for complex, adaptive power management-not simple reset assertion.	Choose when dynamic reconfiguration, event logging, or >4 rail supervision is required; avoid for cost- and size-sensitive fixed-function designs.

Compared with MAX6812HEUT+T and ADM1266ACPZ, the TPS386596L33DGKT delivers optimal balance of channel count, fixed-and-adjustable flexibility, minimal BOM, and deterministic 50-ms timing-making it ideal for FPGA, DSP, and industrial embedded systems where simplicity, reliability, and compact footprint are prioritized over programmability or extended channel count.

Availability

TPS386596L33DGKT is available at Aetrix Electronics and suitable for FPGA power sequencing, DSP/MCU system reset, industrial PLC controllers, and server baseboard management requiring stable component supply, consistent parametric performance, and long-term lifecycle support.

Supply support for TPS386596L33DGKT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability supervisory and power-integrity solutions.

The TPS386596L33DGKT belongs to TI's precision voltage supervisor product line, engineered specifically for multi-rail digital systems-including FPGAs, DSPs, and microcontrollers-that demand accurate, low-power, and deterministic reset behavior across wide temperature and supply ranges.

FAQ

What is the exact function of the SENSE1 pin on the TPS386596L33DGKT?

The SENSE1 pin on the TPS386596L33DGKT is a dedicated, factory-trimmed input with a fixed 2.90-V (typical) threshold designed exclusively to monitor 3.3-V nominal power supplies. It requires no external resistors and asserts the RESET signal when the applied voltage drops below this threshold. This pin is electrically isolated from SENSE2–SENSE4 and maintains ±0.25% typical accuracy across –40°C to +125°C.

Can the TPS386596L33DGKT monitor a 1.0-V rail, and how is the threshold set?

Yes, the TPS386596L33DGKT can monitor a 1.0-V rail using SENSE2, SENSE3, or SENSE4. Each of these pins references an internal 400-mV comparator threshold; a resistor divider (e.g., RSH = 15 kΩ, RSL = 10 kΩ) sets the monitored rail voltage as VMON(n) = (1 + RSH/RSL) × 0.4 V. For 1.0 V, this yields RSH/RSL = 1.5, achievable with standard 1% resistors-ensuring accurate, temperature-stable detection down to 0.4 V.

What is the role of the MR pin on the TPS386596L33DGKT, and does it require an external pullup?

The MR (Manual Reset) pin on the TPS386596L33DGKT is an active-low input that forces RESET assertion regardless of SENSE pin states. It includes a factory-integrated 100-kΩ pullup resistor to VDD and a 50-ns deglitch filter, eliminating the need for external pullup components. A logic-low pulse ≥50 ns on MR immediately triggers RESET, which remains asserted until MR returns high *and* all SENSE inputs exceed their thresholds, followed by the 50-ms delay.

How does the RESET output behave electrically on the TPS386596L33DGKT?

The RESET output on the TPS386596L33DGKT is an open-drain, active-low driver capable of sinking up to 1 mA while maintaining VOL ≤ 0.4 V (at VDD = 1.8–6.5 V). It requires an external pullup resistor (≥10 kΩ) to a valid logic rail (up to 6.5 V). When deasserted, RESET enters high-impedance state after the 50-ms delay; when asserted, it pulls low with <0.4-V drop at 1 mA sink current-compatible with 1.8-V, 3.3-V, and 5-V logic families.

Is the TPS386596L33DGKT suitable for automotive applications, and what is its operating temperature range?

The TPS386596L33DGKT is rated for operation from –40°C to +125°C junction temperature and meets JEDEC JESD22-A108 reliability standards, but it is not AEC-Q100 qualified. It is suitable for under-hood industrial or extended-temperature computing applications (e.g., base stations, PLCs), but not for safety-critical automotive ECUs unless validated per ISO 26262. Its 7-µA quiescent current and 0.25% threshold accuracy support demanding thermal environments where parametric stability is essential.

TPS386596L33DGKT Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Multi-Voltage Supervisor

Number of Voltages Monitored:: 4

Voltage - Threshold:: 2.9V, Adj, Adj, Adj

Output:: Open Drain or Open Collector

Reset:: Active Low

Reset Timeout:: 30ms Minimum

Operating Temperature:: -40°C ~ 125°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-VSSOP

TPS386596L33DGKT FAQ

1.How can I place an order for TPS386596L33DGKT through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS386596L33DGKT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS386596L33DGKT reliable?

The price and inventory of TPS386596L33DGKT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS386596L33DGKT is usually 5 days.

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Once your TPS386596L33DGKT order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS386596L33DGKT?

For technical support, including TPS386596L33DGKT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS386596L33DGKT requirements.

6.How does Aetrix verify that TPS386596L33DGKT is sourced from the original manufacturer or authorized distributors?

All TPS386596L33DGKT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS386596L33DGKT meets industry standards.

7.What is the process for return or replacement of TPS386596L33DGKT?

All TPS386596L33DGKT units undergo pre-shipment inspection (PSI). If there is an issue with TPS386596L33DGKT, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS386596L33DGKT part is unused and in its original packaging.

Return procedure for TPS386596L33DGKT:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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