Texas Instruments TPS38700603SRGERQ1

Overview

TPS38700603SRGERQ1 from Texas Instruments is an AEC-Q100 Grade 1 (–40°C to +125°C) multichannel power-supply sequencer IC with I²C programmability, 6-channel enable outputs (EN1–EN6), 6 general-purpose open-drain outputs (GPO7–GPO12), and SYNC interface for coordinated rail sequencing. It supports programmable power-up/down timing (125 µs to 64 ms in 125 µs steps), features active-low NIRQ fault latching, battery-backed error reporting via VBBAT, and thermal shutdown at 165°C - deployed in automotive ADAS and camera modules.

For engineers reviewing the TPS38700603SRGERQ1 datasheet, TPS38700603SRGERQ1 pinout, TPS38700603SRGERQ1 application, or TPS38700603SRGERQ1 equivalent, key selection considerations include I²C-configurable sequencing windows, SYNC-coupled coordination with TPS389006-Q1 supervisors, backup-state operation under VBBAT, low quiescent current (35–75 µA), and VQFN-24 (4 mm × 4 mm) packaging for space-constrained automotive PCBs.

Technical Context

The TPS38700603SRGERQ1 implements a state-machine-driven sequencing engine synchronized via external SYNC signals from voltage supervisors like the TPS389006-Q1. Its ACT pin controls sequence direction (high = power-up, low = power-down), while ENx outputs are open-drain with <0.1 V low-level voltage at 10 kΩ pull-up and support up to 6 rails with independent timing slots.

I²C interface operates at up to 1 MHz (Fast Mode Plus), supports runtime register readback (e.g., F_EN, F_TSD, ST_NIRQ), and enables reconfiguration of sequencing order, watchdog settings, and delay values post-power-on. The device enters BACKUP state when VDD drops below UVLO (1.90 V) but VBBAT remains ≥1.85 V, retaining configuration and permitting I²C communication.

Key Specifications

Pinout & Package

TPS38700603SRGERQ1 is housed in a thermally enhanced 24-pin VQFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is located at top-left corner adjacent to the pin-1 marker; NC pins (13–15) must remain unconnected.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power-supply sequencing applications.

Compared with TPS38700603SRGERQ1, the 5-channel TPS38700503SRGERQ1 offers identical precision and automotive qualification at lower unit cost, while the SYNC-less TPS38700602SRGERQ1 sacrifices closed-loop rail dependency enforcement for simplified implementation in non-monitored designs.

Availability

TPS38700603SRGERQ1 is available at Aetrix Electronics and suitable for automotive ADAS, FPGA power management, and microcontroller sequencing applications requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.

Supply support for TPS38700603SRGERQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of automotive qualification expertise and broad manufacturing scale.

The TPS38700S-Q1 product line delivers AEC-Q100-compliant, I²C-programmable power sequencers designed specifically for complex automotive electronics requiring precise, coordinated, and fault-resilient multi-rail power management.

FAQ

What is the primary function of the SYNC pin on the TPS38700603SRGERQ1?

The SYNC pin on the TPS38700603SRGERQ1 is an active-low input that enables closed-loop sequencing by accepting handshakes from external voltage supervisors like the TPS389006-Q1. When a monitored rail reaches its programmed UV or OFF threshold, the supervisor asserts SYNC low, triggering the TPS38700603SRGERQ1 to advance to the next enable output. This prevents premature rail activation and ensures dependency-aware power-up/down sequences.

Does the TPS38700603SRGERQ1 support battery-backed operation, and how does it behave during main supply loss?

Yes, the TPS38700603SRGERQ1 supports battery-backed operation via the VBBAT pin (1.85 V–5.5 V). When VDD drops below 1.90 V (UVLO falling threshold) but VBBAT remains ≥1.85 V, the device enters BACKUP state: ENx outputs go low, NRST stays asserted, ACT is ignored, and I²C remains functional. This allows fault flag retention (e.g., F_TSD, F_EN) and post-event diagnostics without main supply.

What I²C speeds and configurations does the TPS38700603SRGERQ1 support?

The TPS38700603SRGERQ1 supports Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz) I²C operation. SCL and SDA are open-drain pins requiring external 10 kΩ pull-up resistors to VDD. The device acts as a slave with fixed 7-bit address (configurable via OTP), supports register readback (e.g., status bits F_INTERR, ST_NIRQ), and tolerates 0–4 V logic levels on SDA/SCL when OTP is set to 3.3 V.

How does the TPS38700603SRGERQ1 handle thermal faults, and what happens to its outputs during thermal shutdown?

Upon junction temperature reaching 165°C, the TPS38700603SRGERQ1 enters Thermal Shutdown (TSD) state: ENx outputs are de-asserted (high-impedance), NRST and NIRQ remain asserted, and I²C communication remains active. The F_TSD bit is set and persists until manually cleared. After temperature falls below 140°C (25°C hysteresis), the device exits TSD and resumes prior configuration in SHDN state - no power cycle required.

Can the TPS38700603SRGERQ1 be used without an external voltage supervisor like the TPS389006-Q1?

Yes - the TPS38700603SRGERQ1 supports blind-timing mode when SYNC is tied high (via 10 kΩ pull-up) and ACT triggers fixed-delay sequencing. In this mode, ENx outputs toggle based solely on I²C-programmed time slots (125 µs or 500 µs steps), independent of rail voltage monitoring. However, SYNC-coupled operation with TPS389006-Q1 is required for dependency-aware, voltage-threshold-triggered sequencing.