Texas Instruments TPS389001DSET

Overview

TPS389001DSET from Texas Instruments is an ultra-low-quiescent-current (2.1 µA typical), 1% accurate adjustable-voltage supervisor IC with user-programmable reset delay (40 µs to 30 s via external capacitor). It monitors supply rails down to 1.15 V using the SENSE pin, asserts an open-drain RESET signal on undervoltage or manual reset (MR) assertion, and operates across –40°C to +125°C for industrial and automotive power-rail monitoring.

For engineers reviewing the TPS389001DSET datasheet, TPS389001DSET pinout, TPS389001DSET application, or TPS389001DSET equivalent, key selection criteria include its adjustable threshold capability (via resistor divider), precision hysteresis (0.575% typical), CT-pin-based delay tuning, low-leakage SENSE input (100 nA max), and WSON-6 package compatibility with space-constrained embedded systems.

Technical Context

The TPS389001DSET implements a precision bandgap reference and comparator architecture with built-in hysteresis to ensure clean, noise-immune reset assertion/deassertion. Its SENSE input accepts voltages up to 5.5 V independent of VDD (1.5–5.5 V), enabling monitoring of higher rails while powered from lower supplies.

Reset timing is governed by a programmable CT pin: a precision 1.15 µA current source charges an external capacitor to a 1.23 V threshold, yielding delay times from 25 µs (no cap) to 30 s (26 µF); internal 200 Ω pulldown discharges the capacitor when RESET is asserted. MR input provides synchronous system-initiated reset with 100 ns glitch immunity.

Key Specifications

Pinout & Package

TPS389001DSET is housed in a 1.5-mm × 1.5-mm, 6-pin WSON (DSE) package with wettable flanks, optimized for automated optical inspection and high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage supervisor applications.

Compared with TPS389001DSET, TPS3897DSET offers pin-compatible simplicity for 1.2 V rails but forfeits adjustability, while MAX6375XR29+T trades programmability and temperature range for lower quiescent current and lower cost in non-automotive contexts.

Availability

TPS389001DSET is available at Aetrix Electronics and suitable for industrial control systems, automotive ADAS modules, medical wearables, and 5G infrastructure requiring stable component supply, long-term lifecycle support, and AEC-Q200-aligned reliability.

Supply support for TPS389001DSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in precision power management and industrial-grade IC design.

The TPS3890 family was engineered for high-accuracy, ultra-low-power system supervision in harsh environments-targeting automotive, industrial, and medical applications where reliable power-rail monitoring directly impacts functional safety and uptime.

FAQ

What is the minimum SENSE input voltage that TPS389001DSET can reliably monitor?

The TPS389001DSET supports adjustable threshold monitoring down to 1.15 V via external resistor divider on the SENSE pin. When configured for lowest threshold, it maintains ±1% accuracy across –40°C to +125°C. The SENSE pin itself accepts 0–5.5 V input, enabling supervision of higher rails (e.g., 3.3 V, 5 V) while powered from lower VDD supplies like 1.8 V. This makes TPS389001DSET uniquely suited for multi-rail systems where core and I/O voltages differ significantly.

How does the CT pin determine reset delay time in TPS389001DSET?

The CT pin in TPS389001DSET controls reset delay via an external capacitor: a precision 1.15 µA current source charges the capacitor to a 1.23 V threshold, triggering RESET deassertion. Delay time follows t_PD(r) = C_CT × 1.07 + 25 µs (nominal), supporting 40 µs to 30 s range. For example, a 100 nF capacitor yields ~110 µs delay. Ceramic capacitors are recommended to minimize leakage; board parasitics must be controlled for accuracy. This architecture replaces discrete RC timers with predictable, temperature-stable timing in TPS389001DSET.

Can TPS389001DSET monitor a 3.3 V rail while powered from a 1.8 V supply?

Yes. The SENSE input of TPS389001DSET operates independently of VDD and accepts voltages from 0 V to 5.5 V, even when VDD is as low as 1.5 V. To monitor a 3.3 V rail, use a resistor divider (e.g., R1 = 1.02 MΩ, R2 = 511 kΩ) to scale 3.3 V down to 1.15 V at SENSE. With VDD = 1.8 V, TPS389001DSET draws only 2.1 µA quiescent current while maintaining full 1% threshold accuracy and 100 nA SENSE leakage-enabling efficient multi-rail supervision without additional level-shifters.

What is the maximum allowable leakage current on the SENSE pin of TPS389001DSET?

The SENSE pin leakage current of TPS389001DSET is specified at ≤100 nA maximum over –40°C to +125°C. This low leakage ensures minimal error in high-impedance resistor-divider networks used to scale higher rails (e.g., 5 V, 12 V) down to the 1.15 V threshold. For example, with a 1 MΩ/1 MΩ divider on a 3.3 V rail, 100 nA leakage introduces only 0.1% error in threshold setting-well within the ±1% overall accuracy budget. This performance distinguishes TPS389001DSET from higher-leakage supervisors unsuitable for precision applications.

Does TPS389001DSET support manual reset functionality, and how is it implemented?

Yes, TPS389001DSET includes a dedicated MR (manual reset) input that provides active-low, asynchronous reset initiation. Driving MR low forces RESET to assert immediately, regardless of SENSE voltage. After MR returns high and SENSE exceeds V_ITP, RESET remains asserted for the full CT-programmed delay before deasserting. MR thresholds scale with VDD (V_IL = 0.25×VDD), ensuring compatibility with 1.8 V, 3.3 V, or 5 V logic. If unused, MR must be tied to VDD; floating MR is not permitted. This feature enables firmware-controlled resets in TPS389001DSET without external logic.