Texas Instruments TPS389012DSER
- Part No.:
- TPS389012DSER
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 6-WFDFN
- Datasheet:
-
TPS389012DSER.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6WSON
- Quantity:
- Payment:

- Shipping:

Inventory:4,440
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Product details
Overview
TPS389012DSER from Texas Instruments is a precision voltage supervisor IC designed for system power-rail monitoring in space-constrained, battery-powered applications. It provides 1.2 V fixed threshold detection (VITN = 1.15 V, VITP = 1.157 V), ±1% accuracy over –40°C to +125°C, 2.1 µA typical quiescent current, and user-programmable reset delay (40 µs to 30 s via external CT capacitor). It asserts an open-drain RESET signal during undervoltage or manual reset events, supporting microcontroller and FPGA power sequencing.
For engineers reviewing the TPS389012DSER datasheet, TPS389012DSER pinout, TPS389012DSER application, or TPS389012DSER equivalent, key selection criteria include its 1.2 V fixed threshold with 0.325–0.825% hysteresis, WSON-6 package (1.5 mm × 1.5 mm), MR input support, and guaranteed operation down to 1.5 V supply - critical for low-voltage embedded systems requiring high accuracy and ultra-low power consumption.
Technical Context
The TPS389012DSER implements a precision bandgap reference and comparator architecture to achieve ±1% threshold accuracy across temperature. Its internal CT pin uses a 1.15 µA precision current source charging an external capacitor to generate programmable reset delay, with built-in compensation for leakage and board parasitics.
It operates in three functional modes: undefined below VPOR (0.8 V), asserted during UVLO (0.8 V < VDD < 1.5 V), and fully active above VDD(min) = 1.5 V. The SENSE input accepts voltages up to 5.5 V independent of VDD, enabling rail monitoring beyond the device's own supply range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Threshold Voltage | Fixed 1.2 V nominal (VITN = 1.15 V, VITP = 1.157 V); enables reliable monitoring of 1.2 V core rails. |
| Threshold Accuracy | ±1% max over –40°C to +125°C; ensures deterministic reset assertion without margining overhead. |
| Quiescent Current | 2.1 µA typical at 3.3 V; extends battery life in always-on supervisory functions. |
| Reset Delay Range | 40 µs to 30 s via CT capacitor; supports wide timing requirements from fast logic to slow-start power supplies. |
| Operating Supply | 1.5 V to 5.5 V on VDD; allows use with diverse host supply domains including 1.8 V, 3.3 V, and 5 V systems. |
| SENSE Input Range | 0 V to 5.5 V (7 V abs max); monitors higher-voltage rails (e.g., 3.3 V I/O) while powered from lower VDD. |
| Hysteresis | 0.325–0.825% (VHYST); prevents chatter during slow-rising/falling rail transitions. |
Pinout & Package
TPS389012DSER is housed in a 1.5-mm × 1.5-mm, 6-pin WSON (DSE) package with wettable flanks, optimized for automated optical inspection and high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SENSE | Monitor input | High-impedance analog input for voltage rail monitoring; accepts 0–5.5 V regardless of VDD. |
| 2: GND | Ground reference | Analog and digital ground return; must be connected directly to low-impedance system ground plane. |
| 3: MR | Manual reset input | Active-low asynchronous reset trigger; logic low forces immediate RESET assertion. |
| 4: VDD | Supply input | Power supply input (1.5–5.5 V); requires local 0.1-µF ceramic decoupling capacitor. |
| 5: CT | Delay timing control | Connects to external capacitor to set reset timeout; 1.15 µA internal current source enables precise delay calculation. |
| 6: RESET | Open-drain output | Asserted low during fault; requires external pullup (10 kΩ–1 MΩ) to compatible voltage rail (≤5.5 V). |
Key Features
| Feature | Design Value |
|---|---|
| Precision 1.2 V threshold | Factory-trimmed VITN = 1.15 V with ±1% accuracy ensures consistent reset point across temperature and process variation. |
| Programmable reset delay | CT pin enables delay tuning from 40 µs to 30 s using a single external capacitor - no firmware or external logic required. |
| Ultra-low quiescent current | 2.1 µA typical enables multi-year battery operation in always-on IoT edge nodes and portable medical devices. |
| Wide SENSE input range | 0–5.5 V input capability allows monitoring of higher-voltage rails (e.g., 3.3 V I/O) while operating from 1.5 V VDD. |
| Robust glitch immunity | SENSE pin immune to transients ≤9 µs (at 5% overdrive), reducing false resets in noisy industrial environments. |
Applications
| Microcontroller Power Sequencing | FPGA Configuration Monitoring |
|---|---|
|
Use Scenario: Ensuring stable 1.2 V VCORE rail before releasing reset to ARM Cortex-M or RISC-V MCU. IC Role / Device Role / Timing Role: Supervises VCORE voltage and holds RESET low until rail stabilizes above 1.15 V and remains valid for ≥1 ms delay. Use Value: Prevents MCU lockup or corrupted boot due to premature release of reset during brownout or slow power ramp. |
Use Scenario: Validating 1.2 V auxiliary supply before FPGA configuration begins. IC Role / Device Role / Timing Role: Monitors dedicated 1.2 V rail powering FPGA configuration logic; asserts open-drain RESET to FPGA's PROG_B or INIT_B pin. Use Value: Guarantees FPGA starts configuration only after stable core voltage, avoiding bitstream load failure. |
| Battery-Powered Wearables | Industrial PLC I/O Modules |
|
Use Scenario: Maintaining system integrity during coin-cell battery discharge in smart watches or health sensors. IC Role / Device Role / Timing Role: Detects 1.2 V regulator droop under load; triggers controlled shutdown via MCU interrupt or hard reset. Use Value: Enables graceful data save and state preservation before brownout-induced crash, extending usable battery life. |
Use Scenario: Supervising isolated 1.2 V digital logic supply in DIN-rail mounted I/O modules exposed to wide ambient temperatures. IC Role / Device Role / Timing Role: Provides fail-safe reset assertion at –40°C to +125°C with no calibration drift; interfaces to isolated RS-485 transceivers. Use Value: Eliminates need for external trimming or temperature compensation, reducing BOM count and qualification effort. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS389001DSER | Adjustable threshold (down to 1.15 V via resistor divider); same package, timing, and quiescent current. | Used when monitoring non-standard rails (e.g., 1.35 V, 1.6 V); requires two external resistors and layout area. | Select TPS389001DSER only if 1.2 V fixed threshold is insufficient; adds design complexity but maximizes flexibility. |
| TPS3808G12DBVR | Same 1.2 V threshold but higher IQ (1.8 µA typ vs 2.1 µA); fixed 200-ms delay; SOT-23-6 package (larger footprint). | Lacks CT programmability and MR input; suited for simpler, cost-sensitive designs where delay is fixed. | Choose TPS3808G12DBVR for legacy compatibility or where delay tuning is unnecessary; avoid if MR or fine-grained timing control is needed. |
Compared with TPS389001DSER and TPS3808G12DBVR, the TPS389012DSER uniquely combines factory-set 1.2 V accuracy, MR input, and full CT-based delay programmability in the smallest WSON-6 footprint - making it optimal for next-generation compact, low-power, and configurable systems.
Availability
TPS389012DSER is available at Aetrix Electronics and suitable for microcontroller power sequencing, FPGA configuration monitoring, battery-powered wearables, and industrial PLC I/O modules requiring stable component supply and long-term lifecycle assurance.
Supply support for TPS389012DSER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with deep expertise in power management and precision analog ICs.
The TPS3890 family was engineered specifically for ultra-low-power, high-accuracy voltage supervision in battery-operated and thermally demanding applications - emphasizing minimal IQ, wide temperature operation, and flexible reset timing.
FAQ
What is the exact threshold voltage specification for TPS389012DSER?
The TPS389012DSER has a factory-set negative threshold voltage (VITN) of 1.15 V and positive threshold voltage (VITP) of 1.157 V, corresponding to a nominal 1.2 V rail. Threshold accuracy is ±1% maximum over –40°C to +125°C, with hysteresis ranging from 0.325% to 0.825% - all confirmed in TI's SLVSD65A datasheet Section 7.5.
Does TPS389012DSER support manual reset functionality?
Yes, TPS389012DSER includes a dedicated MR (manual reset) input (Pin 3). Driving MR low asynchronously forces the open-drain RESET output low, independent of the SENSE voltage. After MR returns high and SENSE exceeds VITP, RESET remains low for the programmed CT delay before deasserting - a feature verified in the Functional Block Diagram and Pin Functions table of the datasheet.
What package type and dimensions does TPS389012DSER use?
TPS389012DSER uses the DSE package: a 6-pin WSON with nominal body size 1.5 mm × 1.5 mm and 0.5-mm pitch. This package features wettable flanks for solder joint inspection and is specified in TI's orderable addendum and Mechanical Information section (Page 18) of SLVSD65A.
Can TPS389012DSER monitor a 3.3 V rail while powered from 1.8 V?
Yes. The SENSE pin accepts input voltages from 0 V to 5.5 V - independent of VDD. So TPS389012DSER can be powered from 1.8 V on VDD while reliably monitoring a 3.3 V I/O rail on SENSE, as confirmed in Section 7.3 (Recommended Operating Conditions) and Section 8.3.4 (SENSE Input) of the datasheet.
What is the minimum VDD required for TPS389012DSER to operate correctly?
The minimum recommended VDD for full functionality is 1.5 V. Below this (but above 0.8 V VPOR), the device enters UVLO mode and asserts RESET regardless of SENSE or MR. Operation below 0.8 V renders RESET undefined. These limits are specified in Section 7.3 and Table 1 (Truth Table) of SLVSD65A.
TPS389012DSER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 1.2V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TPS389012DSER FAQ
1.How can I place an order for TPS389012DSER through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS389012DSER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS389012DSER reliable?
The price and inventory of TPS389012DSER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS389012DSER is usually 5 days.
3.What payment methods are accepted for TPS389012DSER?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS389012DSER transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS389012DSER?
TPS389012DSER orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS389012DSER order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS389012DSER?
For technical support, including TPS389012DSER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS389012DSER requirements.
6.How does Aetrix verify that TPS389012DSER is sourced from the original manufacturer or authorized distributors?
All TPS389012DSER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS389012DSER meets industry standards.
7.What is the process for return or replacement of TPS389012DSER?
All TPS389012DSER units undergo pre-shipment inspection (PSI). If there is an issue with TPS389012DSER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS389012DSER part is unused and in its original packaging.
Return procedure for TPS389012DSER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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