Texas Instruments TPS389012DSET

Overview

TPS389012DSET from Texas Instruments is a precision voltage supervisor IC designed for system power-rail monitoring and reset generation in microcontroller, FPGA, and ASIC applications. It features a fixed 1.2 V nominal threshold (VITN = 1.15 V, VITP = 1.157 V), ±1% threshold accuracy over –40°C to +125°C, 2.1 µA typical quiescent current, and user-programmable reset delay (40 µs to 30 s via external CT capacitor). It asserts an open-drain RESET signal upon undervoltage or manual reset activation.

For engineers reviewing the TPS389012DSET datasheet, TPS389012DSET pinout, TPS389012DSET application, or TPS389012DSET equivalent, key selection criteria include its 1.2 V fixed threshold with 0.325–0.825% hysteresis, WSON-6 (1.5 mm × 1.5 mm) package, MR input support, and guaranteed operation down to 1.5 V supply - critical for low-voltage battery-powered and space-constrained embedded systems.

Technical Context

The TPS389012DSET implements a precision comparator-based supervision architecture with internal reference and programmable timing. Its SENSE input monitors voltages as low as 1.15 V independent of VDD (1.5–5.5 V), while the CT pin enables precise delay control via external capacitor charging (ICT = 1.15 µA, VCT = 1.23 V nominal). The device uses dual thresholds (VITN/VITP) with built-in hysteresis to prevent chatter during rail recovery.

It supports three functional states: normal operation (VDD ≥ 1.5 V), UVLO-limited assertion (VPOR < VDD < 1.5 V), and undefined output below VPOR (0.8 V). The open-drain RESET output requires an external pullup (10 kΩ–1 MΩ) and tolerates up to 5.5 V, enabling level-shifting across mixed-voltage domains without additional logic.

Key Specifications

Pinout & Package

TPS389012DSET is housed in a 6-pin WSON package (1.5 mm × 1.5 mm, 0.5 mm pitch) with wettable flanks for automated optical inspection. The package is RoHS-compliant and moisture-sensitive level 2a.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage supervisor applications.

Compared with TPS389012DSET, TPS389001DSET offers design flexibility at the cost of added components, while MAX6326XR31D3+T trades programmability for lower unit cost and smaller size - making TPS389012DSET optimal for 1.2 V systems requiring precision, low IQ, and field-tunable timing.

Availability

TPS389012DSET is available at Aetrix Electronics and suitable for microcontroller power sequencing, FPGA configuration monitoring, battery-powered sensor nodes, and industrial PLC I/O modules requiring stable component supply and long-term lifecycle support.

Supply support for TPS389012DSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of experience in high-reliability industrial and automotive ICs.

The TPS3890 family was engineered specifically for ultra-low-power, high-accuracy system supervision in space-constrained and battery-operated applications - emphasizing precision thresholding, programmable timing, and wide-temperature operation.

FAQ

What is the exact threshold voltage specification for TPS389012DSET?

The TPS389012DSET has a fixed negative threshold voltage (VITN) of 1.15 V and positive threshold voltage (VITP) of 1.157 V, with ±1% maximum accuracy over –40°C to +125°C. This corresponds to a nominal 1.2 V rail supervision point and provides 0.325–0.825% hysteresis to ensure clean reset assertion and deassertion without chatter during rail recovery.

Can TPS389012DSET monitor a 1.2 V rail while powered from a different supply voltage?

Yes. The TPS389012DSET SENSE input accepts voltages up to 5.5 V independent of VDD, which operates from 1.5 V to 5.5 V. This allows direct monitoring of a 1.2 V rail (via resistive divider or direct connection if rail tolerance permits) while powering the TPS389012DSET from a separate 1.8 V or 3.3 V supply - enabling flexible power domain partitioning.

How is the reset delay time calculated for TPS389012DSET using the CT pin?

The rising-edge RESET delay (tPD(r)) is calculated as tPD(r) = CCT × 1.07 + 25 µs (nominal), where CCT is the external capacitor value in µF. For example, a 100 nF capacitor yields ~132 µs delay. The CT pin uses a 1.15 µA constant-current source charging to a 1.23 V threshold; ceramic capacitors are recommended to minimize leakage-induced timing error.

Does TPS389012DSET support manual reset functionality?

Yes. The MR pin is an active-low manual reset input: driving MR low forces RESET low regardless of SENSE voltage. After MR returns high and SENSE exceeds VITP, RESET remains low for the full programmable delay period. If unused, MR must be tied to VDD to prevent spurious resets.

What package type and dimensions does TPS389012DSET use?

TPS389012DSET uses the DSE package: a 6-pin WSON (Wafer-Level Small Outline No-lead) measuring 1.5 mm × 1.5 mm with 0.5 mm pitch and wettable flanks. This compact, thermally efficient package supports automated optical inspection and is optimized for high-density PCB layouts in portable and industrial equipment.