Texas Instruments TPS389015DSET
- Part No.:
- TPS389015DSET
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 6-WFDFN
- Datasheet:
-
TPS389015DSET.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6WSON
- Quantity:
- Payment:

- Shipping:

Inventory:543
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS389015DSET from Texas Instruments is a precision voltage supervisor IC designed to monitor 1.5 V system rails and assert an open-drain RESET signal upon undervoltage detection. It delivers 1% threshold accuracy (VITN = 1.44 V), programmable delay from 40 μs to 30 s via external capacitor, and ultra-low 2.1 μA quiescent current - enabling reliable power-on reset in battery-powered microcontroller systems.
For engineers reviewing the TPS389015DSET datasheet, TPS389015DSET pinout, TPS389015DSET application, or TPS389015DSET equivalent, this device serves as a low-power, high-accuracy reset supervisor for space-constrained embedded designs requiring stable rail monitoring across –40°C to +125°C.
Technical Context
The TPS389015DSET implements a precision bandgap reference and comparator with built-in hysteresis (0.325–0.825%) to ensure clean, noise-immune RESET assertion/deassertion. Its SENSE input monitors voltages up to 5.5 V independently of VDD (1.5–5.5 V), while the CT pin uses a 1.15 µA precision current source charging a capacitor to set delay time per tPD(r) = CCT × 1.07 + 25 µs.
Manual Reset (MR) provides asynchronous reset initiation with 100 ns glitch immunity; RESET output is open-drain, supporting pull-up to any rail ≤5.5 V regardless of VDD. The device enters undefined state below VPOR (0.8 V) and asserts RESET during UVLO (VPOR < VDD < 1.5 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Threshold Voltage | VITN = 1.44 V (–1% to +1% accuracy over –40°C to +125°C) |
| Quiescent Current | 2.1 µA typical at VDD = 5.5 V - enables >10-year battery life in always-on IoT nodes |
| Reset Delay Range | 40 µs to 30 s via CT capacitor - supports MCU startup timing from fast logic to complex SoC boot sequences |
| Operating Temperature | –40°C to +125°C junction - qualified for automotive under-hood and industrial control environments |
| Supply Voltage Range | VDD = 1.5 V to 5.5 V - allows direct connection to 1.8 V/3.3 V/5 V rails without LDO |
| SENSE Input Range | 0 V to 5.5 V - monitors higher-voltage rails (e.g., 3.3 V I/O) while powered from 1.5 V core |
| Hysteresis | 0.575% typical - prevents chatter during slow-ramp or noisy rail recovery |
Pinout & Package
TPS389015DSET is housed in a 1.5-mm × 1.5-mm, 6-pin WSON (DSE) package with wettable flanks, optimized for automated optical inspection and high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SENSE | Monitor input | Connects directly to 1.5 V rail; asserts RESET when voltage falls below 1.44 V |
| 2: GND | Ground reference | Low-impedance return path for internal reference and comparator; must be tied to system ground plane |
| 3: MR | Asynchronous reset input | Active-low manual reset; drives RESET low immediately when pulled ≤0.25×VDD |
| 4: VDD | Power supply | Supplies internal circuitry; requires 0.1 µF ceramic decoupling capacitor placed adjacent to pin |
| 5: CT | Delay timing control | Connects to ground-referenced capacitor; sets RESET deassertion delay via precision 1.15 µA charge current |
| 6: RESET | Open-drain output | Drives low during fault; requires external pullup (10 kΩ–1 MΩ) to target logic rail (≤5.5 V) |
Key Features
| Feature | Design Value |
|---|---|
| 1% threshold accuracy | Guarantees reliable reset at ±14.4 mV of 1.44 V across full temperature range - eliminates margining uncertainty in safety-critical power sequencing |
| Programmable delay (40 µs–30 s) | Enables one BOM item to support diverse MCU/FPGA boot timing requirements without redesign |
| 2.1 µA quiescent current | Reduces standby power by >50% vs legacy supervisors - critical for coin-cell or energy-harvesting applications |
| Independent SENSE voltage range | Allows monitoring of 3.3 V I/O rail while VDD = 1.5 V - simplifies multi-rail power management architecture |
| –40°C to +125°C operation | Meets AEC-Q100 Grade 1 stress test requirements for automotive body electronics and industrial motor drives |
Applications
| Microcontroller Power Sequencing | FPGA Configuration Monitoring |
|---|---|
Use Scenario: Ensures stable 1.5 V core voltage before releasing reset to ARM Cortex-M or RISC-V MCU during cold start. IC Role / Device Role / Timing Role: Supervisor asserts RESET until 1.5 V rail exceeds 1.44 V and holds it low for user-defined delay (e.g., 100 ms) to guarantee internal regulator stabilization. Use Value: Prevents illegal opcode execution and flash corruption by enforcing minimum power-good hold time aligned with MCU datasheet requirements. | Use Scenario: Monitors 1.5 V auxiliary rail powering FPGA configuration SRAM and I/O banks during power-up and brownout events. IC Role / Device Role / Timing Role: Detects rail collapse below 1.44 V and triggers FPGA reconfiguration via dedicated PROG_B or INIT_B pin through logic-level translation. Use Value: Eliminates configuration bitstream corruption and metastability in high-speed transceivers by providing deterministic, hysteresis-stabilized reset signaling. |
| Battery-Powered Edge Node | Industrial PLC Power Management |
Use Scenario: Supervises 1.5 V rail generated by buck converter from Li-SOCl₂ primary cell in wireless sensor node operating at –40°C. IC Role / Device Role / Timing Role: Uses ultra-low 2.1 µA IDD to extend shelf life; CT capacitor set for 2 s delay to accommodate slow battery ramp-up at low temperature. Use Value: Achieves >15-year battery life in maintenance-free deployments while ensuring robust cold-start behavior without external biasing. | Use Scenario: Validates 1.5 V isolated auxiliary supply feeding real-time Ethernet PHY and watchdog timer in DIN-rail mounted PLC. IC Role / Device Role / Timing Role: Integrates MR input with PLC's system watchdog to force hardware reset on firmware hang; RESET output drives optocoupler input. Use Value: Enables fail-safe recovery from software lockup without host CPU intervention - meeting IEC 61508 SIL-2 functional safety requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS389012DSET | Fixed 1.2 V threshold (VITN = 1.15 V); identical package, pinout, and delay architecture | Designed for 1.2 V core rails (e.g., advanced SoCs); not suitable for 1.5 V monitoring without resistor divider | Select only when supervising 1.2 V supplies - no change to layout or timing design required |
| MAX6315US15D3+T | 1.5 V fixed threshold but higher 8 µA quiescent current; 200 ms fixed delay (non-programmable) | Lacks CT-based delay tuning and MR input; limited to simple POR use cases without manual reset capability | Choose for cost-sensitive, non-battery applications where delay flexibility and manual reset are unnecessary |
Compared with TPS389012DSET, the TPS389015DSET provides exact 1.5 V rail compatibility without external components; versus MAX6315US15D3+T, it delivers 74% lower quiescent current and field-configurable delay - essential for adaptive power management in modern embedded systems.
Availability
TPS389015DSET is available at Aetrix Electronics and suitable for microcontroller power sequencing, FPGA configuration monitoring, battery-powered edge nodes, and industrial PLC power management requiring stable component supply across extended temperature ranges.
Supply support for TPS389015DSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.
The TPS3890 family was engineered specifically for ultra-low-power, high-accuracy voltage supervision in space- and energy-constrained applications - targeting battery-operated IoT sensors, automotive ADAS modules, and industrial edge controllers.
FAQ
What is the exact threshold voltage specification for TPS389015DSET?
The TPS389015DSET has a nominal negative threshold voltage (VITN) of 1.44 V with ±1% accuracy over –40°C to +125°C. This corresponds to a guaranteed range of 1.4256 V to 1.4544 V at TJ = 25°C, tightening to ±0.5% typical. The positive threshold (VITP) is 1.449 V, yielding 0.575% hysteresis. These values are factory-trimmed and verified per TI's production test flow - no external calibration is needed for TPS389015DSET.
How do I calculate the CT capacitor value for a specific reset delay using TPS389015DSET?
Use the formula tPD(r) = CCT × 1.07 + 25 µs, where tPD(r) is the desired rising-edge reset delay in seconds and CCT is capacitance in farads. For example, a 100 ms delay requires CCT = (0.1 – 25×10–6) / 1.07 ≈ 93.4 nF. Select a 100 nF X7R ceramic capacitor with ≤20% tolerance and place it within 2 mm of the CT pin with short, low-inductance traces to minimize leakage error in TPS389015DSET.
Can TPS389015DSET monitor a 3.3 V rail while powered from 1.5 V?
Yes. The SENSE input of TPS389015DSET accepts 0 V to 5.5 V independent of VDD, so it can directly monitor a 3.3 V rail while VDD = 1.5 V. However, the fixed 1.44 V threshold applies only to the SENSE pin voltage - to supervise 3.3 V, you must use the adjustable TPS389001 variant with an external resistor divider. The TPS389015DSET itself is strictly for 1.5 V rail monitoring; attempting to use it for 3.3 V would cause immediate, permanent assertion of RESET.
What is the maximum allowable pullup resistance on the RESET pin of TPS389015DSET?
The RESET pin of TPS389015DSET supports pullup resistors from 10 kΩ to 1 MΩ per TI's recommended operating conditions. At 1 MΩ, the worst-case VOL remains ≤0.25 V with IRESET = 0.4 mA and VDD ≥1.5 V. Higher values increase rise time and susceptibility to noise; values below 10 kΩ raise quiescent current unnecessarily. For 3.3 V logic interfaces, a 47 kΩ pullup balances speed, noise immunity, and power - confirmed in TPS389015DSET characterization data.
Does TPS389015DSET require a decoupling capacitor on the VDD pin?
Yes. A 0.1 µF ceramic capacitor must be placed as close as possible to the VDD pin of TPS389015DSET, per TI's layout guidelines. This stabilizes the internal reference and comparator during transient load events on the monitored rail. Without it, the device may exhibit erratic RESET assertion due to supply bounce - especially during MR-triggered resets or rapid SENSE voltage transitions. The capacitor must be X7R or better, with low ESR, and connected directly to the VDD and GND pins using short, wide traces.
TPS389015DSET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 1.5V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TPS389015DSET FAQ
1.How can I place an order for TPS389015DSET through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS389015DSET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS389015DSET reliable?
The price and inventory of TPS389015DSET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS389015DSET is usually 5 days.
3.What payment methods are accepted for TPS389015DSET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS389015DSET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS389015DSET?
TPS389015DSET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS389015DSET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS389015DSET?
For technical support, including TPS389015DSET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS389015DSET requirements.
6.How does Aetrix verify that TPS389015DSET is sourced from the original manufacturer or authorized distributors?
All TPS389015DSET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS389015DSET meets industry standards.
7.What is the process for return or replacement of TPS389015DSET?
All TPS389015DSET units undergo pre-shipment inspection (PSI). If there is an issue with TPS389015DSET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS389015DSET part is unused and in its original packaging.
Return procedure for TPS389015DSET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS389015DSET Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

