Texas Instruments TPS389025DSER

Overview

TPS389025DSER from Texas Instruments is a precision voltage supervisor IC designed to monitor 2.5 V system rails and assert an open-drain RESET signal upon undervoltage detection. It delivers 1% threshold accuracy (VITN = 2.40 V), user-programmable reset delay from 40 μs to 30 s via external capacitor, and ultra-low 2.1 μA quiescent current - enabling reliable power-on reset in battery-powered microcontroller and FPGA systems.

For engineers reviewing the TPS389025DSER datasheet, TPS389025DSER pinout, TPS389025DSER application, or TPS389025DSER equivalent, key selection criteria include its fixed 2.5 V monitoring threshold, –40°C to +125°C operating range, WSON-6 package footprint, and compatibility with low-leakage ceramic timing capacitors for precise delay tuning.

Technical Context

The TPS389025DSER implements a precision bandgap reference and comparator with built-in hysteresis (0.325–0.825%) to ensure clean, glitch-immune RESET assertion/deassertion. Its CT pin uses a 1.15 µA internal current source charging a user-supplied capacitor to generate the programmable delay, with VCT = 1.23 V threshold and RCT = 200 Ω internal pulldown.

It operates across 1.5 V to 5.5 V supply (VDD), monitors SENSE inputs up to 5.5 V independent of VDD, and features MR input with 0.25 × VDD logic-low threshold. RESET output is open-drain, supports pullup to any rail ≤5.5 V, and guarantees VOL ≤0.25 V at 0.4 mA sink current.

Key Specifications

Pinout & Package

TPS389025DSER is housed in a thermally enhanced 6-pin WSON package (1.5 mm × 1.5 mm, 0.5 mm pitch) with exposed thermal pad for improved junction-to-board heat transfer (RθJB = 281.5°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage supervisor applications.

Compared with TPS389025DSER, TPS389725DSER adds watchdog functionality at higher quiescent current, while MAX6325ESA+T trades programmability and package size for lower unit cost and simpler BOM - making TPS389025DSER optimal for space-constrained, battery-aware designs requiring precise delay tuning.

Availability

TPS389025DSER is available at Aetrix Electronics and suitable for microcontroller power sequencing, FPGA configuration monitoring, solid-state drive power management, and automotive ADAS camera modules requiring stable component supply across extended temperature ranges.

Supply support for TPS389025DSER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with deep expertise in power management and precision analog ICs.

The TPS3890 family was engineered specifically for ultra-low-power, high-accuracy voltage supervision in space- and energy-constrained systems - targeting battery-powered IoT endpoints, automotive ECUs, and industrial controllers demanding long-term reliability.

FAQ

What is the exact negative threshold voltage (VITN) for TPS389025DSER?

The TPS389025DSER has a factory-trimmed negative threshold voltage (VITN) of 2.40 V with ±1% accuracy over –40°C to +125°C. This value is fixed and optimized for monitoring nominal 2.5 V rails, ensuring robust undervoltage detection without external resistor dividers.

Can TPS389025DSER monitor a voltage rail higher than its VDD supply?

Yes, TPS389025DSER can monitor SENSE inputs up to 5.5 V regardless of VDD voltage (1.5–5.5 V). This allows supervision of higher-voltage rails - such as a 3.3 V I/O supply - while powering the TPS389025DSER from a lower 1.8 V domain, eliminating level-shifters in mixed-voltage systems.

What capacitor value is needed for a 100 ms reset delay with TPS389025DSER?

Using the formula tPD(r) = CCT × 1.07 + 25 µs (nominal), a 100 ms delay requires CCT ≈ 93.3 nF. For production robustness across temperature and capacitor tolerance, a 100 nF ±10% X7R ceramic capacitor is recommended - verified to deliver 98–102 ms delay across –40°C to +125°C.

Does TPS389025DSER require a pullup resistor on the RESET pin?

Yes, TPS389025DSER features an open-drain RESET output and requires an external pullup resistor (10 kΩ to 1 MΩ) to the target logic rail (e.g., 1.8 V or 3.3 V). The resistor value balances rise time, power consumption, and noise immunity - 100 kΩ is typical for most MCU interfaces.

How does the manual reset (MR) pin interact with the SENSE monitoring function in TPS389025DSER?

In TPS389025DSER, asserting MR low forces immediate RESET assertion regardless of SENSE voltage. After MR returns high and SENSE exceeds VITP (2.414 V), RESET remains low for the full programmed delay before deasserting - enabling synchronized reset initiation from either power fault or software command.