Texas Instruments TPS389050GQDSERQ1
- Part No.:
- TPS389050GQDSERQ1
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 6-WFDFN
- Datasheet:
-
TPS389050GQDSERQ1.pdf
- Description:
- AUTOMOTIVE LOW-QUIESCENT-CURRENT
- Quantity:
- Payment:

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Product details
Overview
TPS389050GQDSERQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive-grade voltage supervisor IC that monitors 5.0 V system rails with ±0.75% threshold accuracy over –40°C to +125°C, asserts an open-drain RESET signal on undervoltage or manual reset, and supports user-programmable delay from 25 µs to 30 s via external capacitor on CT pin - used in infotainment head units and ADAS camera power sequencing.
For engineers reviewing the TPS389050GQDSERQ1 datasheet, TPS389050GQDSERQ1 pinout, TPS389050GQDSERQ1 application, or TPS389050GQDSERQ1 equivalent, this page delivers verified specifications, validated pin functions, confirmed automotive operating conditions, and real-world timing behavior for safety-critical power monitoring design.
Technical Context
The TPS389050GQDSERQ1 implements a precision bandgap reference and comparator architecture to achieve 1% max threshold accuracy across temperature, with hysteresis of 0.325–0.825% to prevent chatter during rail recovery. Its CT pin uses a 1.15 µA internal current source charging an external capacitor to set reset timeout, while SENSE input accepts up to 5.5 V independent of VDD.
It features dual-threshold detection (VITN = 4.65 V, VITP = 4.677 V), manual reset (MR) input with 0.25×VDD logic-low threshold, and open-drain RESET output rated for 5.5 V pullup - enabling interface with diverse microcontroller reset inputs without level-shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Nominal Threshold | 4.65 V negative threshold (VITN) - monitors 5.0 V rail with 7% undervoltage margin before asserting RESET. |
| Threshold Accuracy | ±0.75% over –40°C to +125°C - ensures reliable reset assertion across full automotive ambient range. |
| Quiescent Current | 2.1 µA typical - enables use in always-on battery domains without significant leakage impact. |
| Reset Delay Range | 25 µs to 30 s via CT capacitor - supports both fast microcontroller startup and long-system-power-up sequences. |
| Operating Voltage | 1.5 V to 5.5 V VDD - allows operation from low-voltage auxiliary supplies while monitoring higher rails. |
| Output Type | Open-drain RESET - permits flexible pullup to any rail ≤5.5 V, including I/O voltage domains different from VDD. |
| ESD Rating | HBM ±2000 V, CDM ±750 V - meets AEC-Q100-002/-011 for robustness in automotive assembly and field environments. |
Pinout & Package
TPS389050GQDSERQ1 is housed in a 1.5-mm × 1.5-mm WSON-6 package with wettable flanks, optimized for automated optical inspection (AOI) and high-density automotive PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SENSE | Monitored voltage input | Accepts 0–5.5 V rail; asserts RESET when voltage drops below 4.65 V (VITN); immune to transients ≥9 µs at 5% overdrive. |
| 2: GND | Ground reference | Primary return path for internal reference and comparator; must be connected to low-impedance system ground plane. |
| 3: MR | Manual reset input | Active-low control: logic low <0.25×VDD forces immediate RESET assertion regardless of SENSE state. |
| 4: VDD | Supply input | Power source (1.5–5.5 V); powers internal circuitry; requires 0.1 µF ceramic bypass capacitor placed adjacent to pin. |
| 5: CT | Delay timing capacitor connection | Connects to ground-referenced capacitor; sets rising-edge RESET delay per tPD(r) = CCT × 1.07 + 25 µs (nom). |
| 6: RESET | Open-drain reset output | Drives low during fault; high-impedance otherwise; requires external pullup resistor (10 kΩ–1 MΩ) to target logic rail. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for –40°C to +125°C ambient operation with HBM ±2000 V and CDM ±750 V ESD robustness. |
| Precision dual-threshold detection | VITN = 4.65 V, VITP = 4.677 V - provides 27 mV hysteresis to eliminate false resets during rail recovery. |
| User-adjustable reset timeout | 25 µs to 30 s via single external capacitor - eliminates need for fixed-delay supervisors or FPGA-based timing logic. |
| Low-input-bias SENSE pin | ≤100 nA input current - enables high-impedance resistor-divider monitoring of non-5V rails without accuracy degradation. |
| Wide VDD supply range | 1.5 V to 5.5 V - supports operation from 1.8 V or 3.3 V auxiliary supplies while supervising 5.0 V main rail. |
Applications
| Infotainment Head Unit | ADAS Camera Module |
|---|---|
Use Scenario: Monitors 5.0 V power rail supplying display controller, audio codec, and USB PHY in vehicle infotainment system. IC Role / Device Role / Timing Role: Voltage supervisor asserting open-drain RESET to ARM Cortex-A MCU upon undervoltage or manual reset request. Use Value: Ensures deterministic boot sequence by holding MCU in reset until 5.0 V rail stabilizes within ±0.75% tolerance and remains valid for programmable delay. |
Use Scenario: Supervises 5.0 V imaging sensor and ISP power domain in forward-facing ADAS camera. IC Role / Device Role / Timing Role: Fault-detection IC triggering system-level reset when 5.0 V rail dips below 4.65 V due to load transients or cold-cranking events. Use Value: Prevents corrupted image capture or ISP lockup by enforcing minimum 1 ms reset hold time after rail recovery - configurable via CT capacitor. |
| Hybrid Digital Cluster | Automotive Gateway |
Use Scenario: Validates 5.0 V supply to TFT LCD driver and CAN FD transceiver in digital instrument cluster. IC Role / Device Role / Timing Role: Automotive-grade supervisor interfacing with cluster MCU's XRS pin via open-drain RESET with 3.3 V pullup. Use Value: Enables rail-agnostic reset signaling: TPS389050GQDSERQ1 VDD may be 3.3 V while RESET pulls up to 5.0 V domain for proper logic-level compatibility. |
Use Scenario: Monitors 5.0 V domain powering multi-protocol gateway MCU, Ethernet PHY, and LIN transceivers. IC Role / Device Role / Timing Role: Centralized power monitor providing synchronized reset to subsystems during brownout or ignition cycling. Use Value: Guarantees coordinated restart across CAN, Ethernet, and LIN interfaces by asserting RESET only after all monitored rails exceed 4.65 V and remain stable for user-defined delay. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS389050L-Q1 | Lower threshold: VITN = 4.40 V (vs. 4.65 V), wider hysteresis (0.575% typ) | Suitable for 5.0 V rails with tighter regulation tolerance or higher ripple; less aggressive trip point | Select when system requires earlier reset assertion under marginal 5.0 V conditions. |
| TPS389050-Q1 | Fixed 4.80 V VITN (±1% max), no G-suffix variant - standard grade without tightened accuracy bin | General-purpose 5.0 V supervision where ±0.75% accuracy is not required for ASIL-B compliance | Choose for cost-sensitive non-safety-critical modules where full AEC-Q100 Grade 1 accuracy margin is unnecessary. |
Compared with TPS389050GQDSERQ1, TPS389050L-Q1 offers earlier fault detection at lower voltage but reduced noise immunity, while TPS389050-Q1 trades guaranteed ±0.75% accuracy for broader availability and lower unit cost - making TPS389050GQDSERQ1 optimal for ASIL-B–aligned systems requiring precise, early-reset capability.
Availability
TPS389050GQDSERQ1 is available at Aetrix Electronics and suitable for automotive infotainment, ADAS camera, and digital cluster applications requiring stable component supply, AEC-Q100 compliance, and production-ready traceability.
Supply support for TPS389050GQDSERQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and automotive ICs, with decades of leadership in high-reliability power management and supervision solutions.
The TPS3890-Q1 product line delivers ultra-low-quiescent-current, programmable-delay voltage supervisors engineered specifically for automotive power-rail monitoring in ASIL-B–capable systems.
FAQ
What is the exact negative threshold voltage (VITN) of the TPS389050GQDSERQ1?
The TPS389050GQDSERQ1 has a factory-trimmed negative threshold voltage (VITN) of 4.65 V, with guaranteed accuracy of ±0.75% over –40°C to +125°C ambient temperature. This value is specific to the 'G' suffix variant and differs from other members of the TPS3890-Q1 family such as the standard TPS389050-Q1 (VITN = 4.80 V) or TPS389050L-Q1 (VITN = 4.40 V). The TPS389050GQDSERQ1 datasheet confirms this value in the Device Comparison Table and Electrical Characteristics section.
Does the TPS389050GQDSERQ1 support operation from a 3.3 V supply while monitoring a 5.0 V rail?
Yes, the TPS389050GQDSERQ1 supports VDD from 1.5 V to 5.5 V independently of the monitored SENSE voltage, which can range from 0 V to 5.5 V. This allows the device to be powered from a 3.3 V auxiliary rail while reliably supervising a 5.0 V main supply via the SENSE pin. The TPS389050GQDSERQ1 internal reference and comparator operate correctly under this configuration, as verified in the Recommended Operating Conditions table and Typical Application Circuit diagrams.
How is the reset delay time calculated for the TPS389050GQDSERQ1 using the CT pin?
The rising-edge RESET delay time (tPD(r)) for the TPS389050GQDSERQ1 is calculated as tPD(r) = CCT × 1.07 + 25 µs (nominal), where CCT is the capacitance (in µF) connected between CT pin and GND. This formula derives from the device's 1.15 µA CT charging current and 1.23 V comparator threshold voltage. For example, a 10 µF capacitor yields ~10.73 ms delay. The TPS389050GQDSERQ1 datasheet specifies this relationship in Section 6 (Pin Functions) and Section 8.3.1 (User-Configurable RESET Delay Time).
Is the RESET output of the TPS389050GQDSERQ1 compatible with 3.3 V microcontrollers?
Yes, the TPS389050GQDSERQ1 RESET pin is open-drain and supports pullup to any voltage rail from 1.5 V to 5.5 V - including 3.3 V logic domains. When pulled up to 3.3 V, the RESET signal meets standard CMOS input thresholds for microcontrollers such as TI's C2000 or Sitara families. The device's VOL specification (≤0.25 V at 0.4 mA) ensures clean low-state signaling, and its ILKG(OD) leakage (<250 nA) prevents unintended logic-high drift.
What automotive qualification level does the TPS389050GQDSERQ1 meet?
The TPS389050GQDSERQ1 is qualified to AEC-Q100 Grade 1, with full characterization across –40°C to +125°C ambient temperature, HBM ESD rating of ±2000 V, and CDM ESD rating of ±750 V. It is intended for use in automotive applications including infotainment, ADAS, and digital clusters where functional safety requirements align with ASIL-B decomposition. This qualification status is explicitly stated in the Features section and Device Information table of the official TPS3890-Q1 datasheet (SBVS303B).
TPS389050GQDSERQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 5V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TPS389050GQDSERQ1 FAQ
1.How can I place an order for TPS389050GQDSERQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS389050GQDSERQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS389050GQDSERQ1 reliable?
The price and inventory of TPS389050GQDSERQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS389050GQDSERQ1 is usually 5 days.
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5.How can I obtain technical support or documentation for TPS389050GQDSERQ1?
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6.How does Aetrix verify that TPS389050GQDSERQ1 is sourced from the original manufacturer or authorized distributors?
All TPS389050GQDSERQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS389050GQDSERQ1 meets industry standards.
7.What is the process for return or replacement of TPS389050GQDSERQ1?
All TPS389050GQDSERQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS389050GQDSERQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS389050GQDSERQ1 part is unused and in its original packaging.
Return procedure for TPS389050GQDSERQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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