Texas Instruments TPS3895PDRYR

Overview

TPS3895PDRYR from Texas Instruments is a single-channel, adjustable-voltage supervisor IC with push-pull output, designed for precise power-rail monitoring in space-constrained systems. It features a 0.5 V fixed internal threshold (±1% over –40°C to 125°C), 0.2 µs enable-to-output propagation delay, 6 µA typical quiescent current, and operates from 1.7 V to 6.5 V supply. It is used to assert reset or enable signals to microcontrollers and FPGAs after power stabilization.

For engineers reviewing the TPS3895PDRYR datasheet, TPS3895PDRYR pinout, TPS3895PDRYR application, or TPS3895PDRYR equivalent, key selection criteria include its ultra-small USON-6 (1.45 mm × 1.00 mm) package, capacitor-adjustable delay via CT pin, active-high ENABLE logic, and compatibility with low-voltage logic interfaces requiring fast, deterministic enable timing.

Technical Context

The TPS3895PDRYR implements a precision comparator with 5 mV hysteresis to reject noise-induced false triggers during voltage transitions. Its internal 310 nA CT pin current source charges an external capacitor to generate a user-defined delay before SENSE_OUT assertion - though the P-version bypasses this for ENABLE-triggered events with a fixed 0.2 µs response.

Unlike A-versions, the TPS3895PDRYR uses direct enable control: when ENABLE rises high and SENSE exceeds 0.5 V, SENSE_OUT drives high within 0.2 µs; if SENSE falls below (0.5 V − 5 mV), SENSE_OUT deasserts in 16 µs. This enables tight timing control for synchronous power sequencing in battery-powered and embedded systems.

Key Specifications

Pinout & Package

TPS3895PDRYR is housed in a 6-pin USON (DRY) package measuring 1.45 mm × 1.00 mm × 0.5 mm, optimized for ultra-dense PCB layouts and automated assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage supervisor applications.

Compared with TPS3895ADRYR and TPS3897PDRYR, the TPS3895PDRYR delivers the fastest and most predictable ENABLE response (0.2 µs), making it optimal for tightly timed power sequencing where minimal jitter and fixed latency are critical - while retaining full pin compatibility and shared design resources across the TPS389x family.

Availability

TPS3895PDRYR is available at Aetrix Electronics and suitable for microcontroller power sequencing, FPGA configuration enable, battery-powered sensor nodes, and industrial PLC I/O modules requiring stable component supply and long-term manufacturability.

Supply support for TPS3895PDRYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions for industrial, automotive, and personal electronics markets.

The TPS389x product line was developed to address demand for ultra-miniature, low-quiescent-current voltage supervisors in space- and power-constrained applications such as wearables, IoT edge nodes, and automotive infotainment subsystems.

FAQ

What is the minimum detectable voltage threshold for TPS3895PDRYR?

The TPS3895PDRYR has a fixed internal threshold of 0.5 V with ±1% accuracy over temperature. It can monitor any external voltage ≥0.5 V using an external resistor divider on the SENSE pin. The device does not support thresholds below 0.5 V, and the actual monitored voltage is calculated as V_IN = 0.5 V × (1 + R1/R2), where R1 and R2 form the divider network feeding the SENSE pin.

Does TPS3895PDRYR require an external pull-up resistor on SENSE_OUT?

No, TPS3895PDRYR does not require an external pull-up resistor on SENSE_OUT because it features a push-pull output stage. The output actively drives high (to VCC level) and low (to GND), eliminating the need for external biasing components and simplifying layout in single-supply systems.

How is the delay time configured on TPS3895PDRYR?

The TPS3895PDRYR supports two distinct delay paths: (1) SENSE-rising delay is set by connecting a capacitor between CT and GND, with t_delay = [C_CT (µF) × 4] + 40 µs; (2) ENABLE-rising delay is fixed at 0.2 µs - no capacitor needed. Leaving CT open yields the minimum 40 µs SENSE delay, while values up to 47 nF extend delay to ~190 ms.

What is the maximum voltage rating for the SENSE_OUT pin of TPS3895PDRYR?

The SENSE_OUT pin of TPS3895PDRYR is rated for operation up to VCC (max 6.5 V) in push-pull mode. Unlike open-drain variants (e.g., TPS3897PDRYR), it cannot be pulled up to voltages exceeding VCC. Absolute maximum rating is 7 V, but sustained operation above VCC risks damage and violates recommended operating conditions.

Is TPS3895PDRYR pin-compatible with MAX6895?

Yes, TPS3895PDRYR is explicitly documented as pin-for-pin compatible with MAX6895 in the TI datasheet (SBVS172B). Both devices share identical USON-6 (DRY) package dimensions, pin assignments (ENABLE, GND, SENSE, SENSE_OUT, CT, VCC), and functional behavior - enabling drop-in replacement in existing designs without PCB modification.