Texas Instruments TPS51020DBTRG4
- Part No.:
- TPS51020DBTRG4
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 30-TFSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS51020DBTRG4.pdf
- Description:
- IC REG CTRLR DDR 2OUT 30TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,983
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS51020DBTRG4 from Texas Instruments is a dual-synchronous step-down controller for notebook system power, supporting both independent dual-mode (5 V/3.3 V) and DDR-specific termination (VDDQ/VTT). It delivers 0.85-V internal reference accuracy (±1%), 180° interleaved phase operation, feed-forward voltage-mode control, and integrated 5-V/60-mA regulator - enabling high-efficiency conversion without current-sense resistors in battery-powered computing systems.
For engineers reviewing the TPS51020DBTRG4 datasheet, TPS51020DBTRG4 pinout, TPS51020DBTRG4 application, or TPS51020DBTRG4 equivalent, key selection criteria include DDR mode support with (VO1_VDDQ)/2 tracking, RDS(on)-based overcurrent detection (4200 ppm/°C), selectable 270/360/450-kHz switching, and dual-channel soft-start sequencing via SSTRT1/SSTRT2 pins.
Technical Context
The TPS51020DBTRG4 implements feed-forward voltage-mode control with two independent error amplifiers, each referencing either a precision 0.85-V internal source (dual mode) or (VO1_VDDQ)/2 (DDR mode). Its oscillator supports three fixed frequencies selected by external resistor-capacitor networks on SSTRT1/SSTRT2, with automatic ramp-up from 270 kHz to 450 kHz during soft-start.
It integrates high-side and low-side N-channel MOSFET drivers with 2.5–3 Ω pull-up/pull-down impedance, 100-ns non-overlap dead time, and boot-strapped gate drive using internal diodes. Overcurrent protection uses RDS(on) sensing with temperature-compensated trip thresholds (4200 ppm/°C), while PGOOD monitors both outputs within ±7.5% regulation with 2048-clock delay.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 28 V - supports Li-ion battery packs (3–4 cell) and AC adapter inputs without external pre-regulation. |
| Reference Accuracy | 0.84 V to 0.86 V at 25°C - enables ≤1% output voltage tolerance for DDR I/II VDDQ rails. |
| Switching Frequency | 270 / 360 / 450 kHz - selectable via SSTRTx resistor network; higher frequencies reduce output filter size. |
| Phase Relationship | 180° interleaved - cuts input ripple current by ~70%, easing input capacitor RMS current rating. |
| Overcurrent Detection | RDS(on)-based with 4200 ppm/°C tempco - eliminates sense resistor losses while maintaining thermal stability across −40°C to 85°C. |
| Integrated Regulator | 5 V / 60 mA - powers internal logic and gate drivers; switchover to external 5 V via REG5_IN improves system efficiency. |
| Power Good Threshold | ±7.5% window with 2048-clock delay - ensures stable rail sequencing before host processor release. |
Pinout & Package
TPS51020DBTRG4 is housed in a 30-pin TSSOP (DBT) package with 0.5-mm pitch, thermally enhanced for notebook power delivery applications. Pin numbering follows standard top-view orientation per TI SLUS564C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INV1, INV2 | Error amplifier inverting input | Feedback node for VO1_VDDQ and VO2; also serves as OVP/UVP and skip comparator input. |
| COMP1, COMP2 | Error amplifier output | Compensation node for Type II/III loop filters; connects to INVx and external RC network. |
| OUT1_U, OUT2_U | High-side N-MOSFET driver output | Drives gate of upper FET; requires bootstrap capacitor between VBSTx and LLx. |
| OUT1_D, OUT2_D | Low-side N-MOSFET driver output | Drives gate of lower FET; 2.5 Ω sink/source impedance ensures fast turn-on/turn-off. |
| LL1, LL2 | Switch-node connection | Connects to drain of high-side FET and source of low-side FET; used for RDS(on) current sensing. |
| SSTRT1, SSTRT2 | Soft-start/frequency select input | Capacitor-based ramp generator; sets soft-start time and selects 270/360/450 kHz frequency. |
| DDR | Mode selection input | Ground = DDR mode (VTT = VO1_VDDQ/2); ≥2.2 V = dual mode (independent 0.85-V references). |
| PGOOD | Open-drain power-good indicator | Asserts high only when both outputs are within ±7.5%; ignores channel if corresponding ENBLx is low. |
Key Features
| Feature | Design Value |
|---|---|
| Feed-forward voltage-mode control | Eliminates need for current-sense resistor, reducing conduction loss and PCB area in high-current notebook rails. |
| Selectably enabled autoskip mode | Maintains >85% efficiency at light loads (e.g., S3 suspend) without external circuitry or firmware intervention. |
| Integrated 5-V/60-mA linear regulator | Powers internal logic and gate drivers; bypassed by external 5 V on REG5_IN to improve overall system efficiency. |
| DDR-specific VTT generation | Automatically configures VO2 as (VO1_VDDQ)/2 sink/source with buffered REF_X output - no external op-amp required. |
| 180° interleaved dual-channel operation | Reduces input capacitor RMS current by ~70%, allowing smaller, lower-cost ceramic input capacitors. |
Applications
| Notebook System Bus Power | DDR I/II Termination |
|---|---|
Use Scenario: Providing regulated 5 V and 3.3 V rails for chipset, USB controllers, and peripheral interfaces in ultraportable notebooks. IC Role / Device Role / Timing Role: Dual-channel synchronous buck controller managing independent output voltages with coordinated soft-start sequencing. Use Value: Eliminates discrete current-sense resistors and external 5-V LDO, reducing BOM count by ≥3 components and improving light-load efficiency. |
Use Scenario: Generating matched VDDQ (1.8 V or 2.5 V) and VTT (½ × VDDQ) for DDR memory termination in mobile platforms. IC Role / Device Role / Timing Role: DDR-mode controller with automatic (VO1_VDDQ)/2 reference tracking and bidirectional VTT current sinking/sourcing capability. Use Value: Achieves <±1% VTT tracking accuracy without external op-amps or precision dividers, meeting JEDEC DDR I/II specifications. |
| Mobile CPU Core Logic Supply | Battery-Powered Embedded Systems |
Use Scenario: Delivering tightly regulated 1.5 V or 1.8 V to CPU core logic in fanless tablets and 2-in-1 devices with dynamic load steps. IC Role / Device Role / Timing Role: High-bandwidth voltage-mode controller with feed-forward compensation and 100-ns minimum pulse width for fast transient response. Use Value: Maintains <±2% output deviation during 5-A/µs load transients, avoiding CPU throttling or reset events. |
Use Scenario: Powering industrial handhelds and medical monitors requiring long battery life and robust fault handling. IC Role / Device Role / Timing Role: Dual-output controller with UVLO/OVP/UVP protection, PGOOD sequencing, and shutdown current <1 µA. Use Value: Enables >30-day shelf life in storage mode via VIN shutdown current of 0.05 µA and full rail disable via ENBL1/ENBL2. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS51116RGER | Single-chip solution with integrated MOSFETs (30-V max), 3-A per channel, no external BST diodes required. | Targeted at lower-power notebooks (<15 W per rail); lacks DDR-specific VTT tracking and REF_X buffer. | Choose TPS51116RGER for space-constrained designs where integrated FETs simplify layout and reduce component count. |
| ISL95831IRZ | Supports 3-phase operation, 1% reference, but uses current-mode control and requires external current-sense resistors. | Designed for high-performance ultrabooks with multi-phase CPU cores; no native DDR termination mode. | Choose ISL95831IRZ when interleaving >2 phases or precise current balancing across rails is required. |
Compared with TPS51020DBTRG4, TPS51116RGER reduces external component count but sacrifices DDR-specific VTT generation and RDS(on) current sensing, while ISL95831IRZ adds phase flexibility at the cost of higher BOM complexity and no integrated DDR mode logic.
Availability
TPS51020DBTRG4 is available at Aetrix Electronics and suitable for notebook system bus power, DDR I/II termination, and mobile CPU core logic supply requiring stable component supply across extended production lifecycles.
Supply support for TPS51020DBTRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management ICs for computing and portable electronics.
The TPS51020DBTRG4 belongs to TI's notebook power controller product line, engineered specifically for high-efficiency, low-noise, dual-rail DC/DC conversion in space- and thermal-constrained mobile platforms.
FAQ
What is the primary function of the DDR pin on the TPS51020DBTRG4?
The DDR pin on the TPS51020DBTRG4 selects between dual-mode and DDR-mode operation. When pulled low (<0.3 V), it configures VO2 as a VTT rail tracking (VO1_VDDQ)/2 with REF_X outputting the same buffered voltage. When held high (>2.2 V), it enables independent dual-mode operation with both channels referenced to the internal 0.85-V source. The TPS51020DBTRG4 must not have DDR toggled while ENBL1 or ENBL2 is asserted high to prevent REF_X overvoltage.
How does the TPS51020DBTRG4 achieve overcurrent protection without a sense resistor?
The TPS51020DBTRG4 implements RDS(on)-based overcurrent detection by monitoring the voltage drop across the high-side MOSFET's intrinsic on-resistance using the TRIP1 and TRIP2 pins. This method eliminates external sense resistors and associated power loss. The TPS51020DBTRG4 includes 4200 ppm/°C temperature compensation to maintain trip accuracy across −40°C to 85°C ambient.
Can the TPS51020DBTRG4 operate with an external 5-V supply instead of VIN?
Yes - the TPS51020DBTRG4 supports external biasing via the REG5_IN pin. When REG5_IN is driven with ≥4.7 V, the internal 5-V linear regulator (VREG5) shuts off and VREG5 becomes a pass-through output. This configuration routes quiescent current from the external 5-V rail instead of VIN, improving overall system efficiency. The TPS51020DBTRG4 requires REG5_IN ≤ VIN in this mode.
What is the role of the SSTRT1 and SSTRT2 pins on the TPS51020DBTRG4?
SSTRT1 and SSTRT2 serve dual functions: soft-start timing and switching frequency selection. Each pin accepts an external capacitor to set soft-start ramp time, and its voltage level (via optional resistor divider) selects 270 kHz, 360 kHz, or 450 kHz operation per Table 1 in the datasheet. The TPS51020DBTRG4 begins at 270 kHz during startup and transitions to the final frequency once regulation is achieved.
Does the TPS51020DBTRG4 support interleaved operation, and how is it implemented?
Yes - the TPS51020DBTRG4 implements true 180° interleaved operation between its two synchronous buck channels. This is achieved internally via phase-shifted oscillator signals, reducing input ripple current magnitude and RMS stress on the input capacitor. The interleaving is transparent to the user and requires no external synchronization; the TPS51020DBTRG4 maintains this relationship regardless of frequency selection or mode (dual or DDR).
TPS51020DBTRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 30-TFSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Applications:
- Controller, DDR
- Voltage - Input:
- 4.5V ~ 28V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.9V ~ 24V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 30-TSSOP
TPS51020DBTRG4 FAQ
1.How can I place an order for TPS51020DBTRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS51020DBTRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS51020DBTRG4 reliable?
The price and inventory of TPS51020DBTRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS51020DBTRG4 is usually 5 days.
3.What payment methods are accepted for TPS51020DBTRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS51020DBTRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS51020DBTRG4?
TPS51020DBTRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS51020DBTRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS51020DBTRG4?
For technical support, including TPS51020DBTRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS51020DBTRG4 requirements.
6.How does Aetrix verify that TPS51020DBTRG4 is sourced from the original manufacturer or authorized distributors?
All TPS51020DBTRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS51020DBTRG4 meets industry standards.
7.What is the process for return or replacement of TPS51020DBTRG4?
All TPS51020DBTRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS51020DBTRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS51020DBTRG4 part is unused and in its original packaging.
Return procedure for TPS51020DBTRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS51020DBTRG4 Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

