Texas Instruments TPS5130PTRG4

Overview

TPS5130PTRG4 from Texas Instruments is a quad-output power management IC integrating three synchronous buck regulator controllers and one LDO controller for notebook CPU/core/I/O rail sequencing. It supports 4.5 V–28 V input, delivers 0.9 V–5.5 V switcher outputs and 0.9 V–2.5 V LDO output, features ±1.5% reference accuracy, 300–500 kHz PWM operation, and programmable overcurrent/overvoltage/undervoltage protection. It is used in multi-rail portable computing power systems requiring precise voltage tracking and fault tolerance.

For engineers reviewing the TPS5130PTRG4 datasheet, TPS5130PTRG4 pinout, TPS5130PTRG4 application, or TPS5130PTRG4 equivalent, key selection considerations include per-channel soft-start control (SS_STBY1–3), independent standby enable (STBY_LDO, STBY_VREF3.3/5), 0.85-V precision reference (REF), programmable powergood delay (PG_DELAY), and integrated 5-V/3.3-V linear regulators for gate drive and system bias.

Technical Context

The TPS5130PTRG4 implements three independent synchronous buck controllers with high-side/low-side N-MOSFET drivers, each featuring a high-speed error amplifier (2.5 MHz unity-gain bandwidth), auto PWM/SKIP mode selection via PWM_SEL, and phase-shifted operation to minimize input ripple. Each channel uses VIN_SENSEx and TRIPx pins for temperature-compensated current limiting (13 µA nominal I_TRIP).

Its LDO controller drives an external N-channel MOSFET with dedicated LDO_IN, LDO_CUR, LDO_GATE, and LDO_OUT terminals; it includes overshoot suppression (25 mA sink at LDO_OUT), fixed 600 µs soft-start, and shared FLT latch timer with the buck controllers. The device integrates internal 5-V and 3.3-V linear regulators-VREF5 (±4% tolerance, 50 mA max) and VREF3.3 (±3%, 30 mA max)-both controllable via standby inputs.

Key Specifications

Pinout & Package

TPS5130PTRG4 is housed in a 48-pin plastic TQFP (PT) package with 0.5 mm pitch, thermally enhanced for power delivery applications. Pin functions are validated per TI SLVS426 datasheet (May 2002), with dedicated terminals for per-channel control, sensing, and gate drive.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail power controller applications.

Compared with TPS5130PTRG4, TPS51220ARUKR omits one buck channel and the 3.3-V regulator, reducing integration but improving thermal density; ISL95831IRZ adds digital control and higher current capability at the cost of analog simplicity and legacy compatibility.

Availability

TPS5130PTRG4 is available at Aetrix Electronics and suitable for notebook PC power subsystems, portable game console DC/DC conversion, and DSP processor multi-rail supply designs requiring stable component supply across extended production lifecycles.

Supply support for TPS5130PTRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power solutions.

The TPS5130PTRG4 belongs to TI's notebook power controller product line, designed specifically for multi-phase, multi-rail CPU and system power delivery in space-constrained portable platforms with strict efficiency and sequencing requirements.

FAQ

What is the function of the REF pin on the TPS5130PTRG4?

The REF pin on the TPS5130PTRG4 provides a stable 0.85-V ±1.5% bandgap reference voltage used as the feedback reference for all three buck controllers and the LDO controller. It also serves as the basis for overvoltage (0.95 V) and undervoltage (0.55 V) protection thresholds. This reference is derived from the internal 5-V regulator and remains active as long as STBY_VREF5 is asserted high. The TPS5130PTRG4 uses this single reference to ensure consistent regulation accuracy and protection timing across all four output channels.

How does the TPS5130PTRG4 implement overcurrent protection for its buck channels?

The TPS5130PTRG4 implements resistor-programmable overcurrent protection for each buck channel using the TRIPx pin and an external resistor between VIN_SENSEx and TRIPx. An internal 13 µA (typ.) current source generates a set-point voltage across the resistor; when the MOSFET drain-source voltage exceeds this value during conduction, the current comparator triggers pulse extension or termination. The TPS5130PTRG4 includes temperature compensation (+3400 ppm/°C) to track MOSFET R_DS(on) drift, ensuring stable current limits from −40°C to 85°C. Fault latching is managed via the shared FLT pin.

Can the TPS5130PTRG4 drive both high-side and low-side N-channel MOSFETs without external level shifters?

Yes, the TPS5130PTRG4 integrates fully self-contained high-side and low-side gate drivers for N-channel MOSFETs. High-side drive uses internal 5-V regulation (VREF5) and bootstrap capacitors (LHx–LLx) to generate floating gate voltage; low-side drive references directly to OUTGNDx with 5-V sourcing. No external level shifters are needed. The TPS5130PTRG4 specifies 1.2 A high-side and 1.5 A low-side peak drive current, supporting MOSFETs with gate charges up to 50 nC at 500 kHz. Dead-time is internally fixed at 100 ns to prevent shoot-through.

What is the role of the PG_DELAY pin on the TPS5130PTRG4?

The PG_DELAY pin on the TPS5130PTRG4 allows programmable delay of the open-drain PGOUT signal assertion after all outputs reach regulation. An external capacitor between PG_DELAY and GND sets the RC time constant that controls the rising edge slew rate of PGOUT during startup. This prevents premature system release from reset during soft-start ramp-up. The TPS5130PTRG4 uses this pin to ensure powergood is only asserted after stable regulation is confirmed across all four outputs (three buck + LDO), with delay times scalable from microseconds to milliseconds depending on capacitor value.

Does the TPS5130PTRG4 support independent enable/disable of its internal 5-V and 3.3-V linear regulators?

Yes, the TPS5130PTRG4 supports independent control of its internal 5-V (VREF5) and 3.3-V (VREF3.3) linear regulators via STBY_VREF5 and STBY_VREF3.3 pins. Driving either pin low disables its respective regulator output while preserving functionality of other blocks. Both regulators remain active by default when their standby pins are pulled high. The TPS5130PTRG4 datasheet confirms that VREF5 powers high-side drivers and REF, while VREF3.3 supplies auxiliary system bias; disabling either affects dependent subsystems but does not halt core buck or LDO operation.