Texas Instruments TPS51367RVER
- Part No.:
- TPS51367RVER
- Manufacturer:
- Texas Instruments
- Package:
- 28-VFQFN Exposed Pad
- Datasheet:
-
TPS51367RVER.pdf
- Description:
- IC REG BUCK ADJ 12A 28VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,441
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Product details
Overview
TPS51367RVER from Texas Instruments is a 22-V input, 12-A synchronous step-down DC/DC converter with integrated high- and low-side FETs, D-CAP2™ control architecture, ULQ™ low-power mode (100 µA quiescent current), and programmable 400 kHz / 800 kHz switching frequency. It delivers precise 0.6 V to 2.0 V output for DDR memory rails such as VDDQ in notebook computers.
For engineers reviewing the TPS51367RVER datasheet, TPS51367RVER pinout, TPS51367RVER application, or TPS51367RVER equivalent, key selection criteria include its integrated FET capability, differential voltage sensing, ULQ™ standby current, thermal shutdown protection, and compatibility with all-MLCC output capacitor designs.
Technical Context
The TPS51367RVER implements adaptive on-time D-CAP2™ control using internal phase compensation (60 µS transconductance amplifier + SLEW capacitor integrator) to achieve stable loop operation without external compensation components across POSCAP and all-MLCC output configurations. Its zero-crossing detection enables auto-skip light-load operation.
It supports dual-frequency operation via MODE pin (GND = 400 kHz, FLOAT = 800 kHz), integrates temperature-compensated low-side RDS(on) current sensing (7.5 mΩ typ), and features programmable overcurrent limit (7–18 A) via TRIP pin with valley-current detection and negative OCL protection during OOB/OVP events.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3 V to 22 V - Supports wide-input notebook and industrial POL applications without pre-regulation. |
| Output Current | 12 A continuous - Integrated 15 mΩ high-side and 7.5 mΩ low-side FETs enable single-chip 12-A solution. |
| Output Voltage Range | 0.6 V to 2.0 V - Programmable via REFIN/REFIN2 pins or resistor divider; factory-fixed options include 1.05 V, 1.2 V, 1.35 V, 1.5 V. |
| Quiescent Current (ULQ™) | 100 µA - Enables extended battery life in system standby when LP# is asserted low. |
| Switching Frequency | 400 kHz or 800 kHz - Selectable via MODE pin; supports optimized trade-offs between size (0.33 µH at 800 kHz) and efficiency. |
| Protection Features | OCL, OVP (120% threshold), UVP (66% threshold), UVLO (4.0 V), thermal shutdown (140°C), non-latch - Ensures robust fault recovery in memory rail applications. |
| Package | 28-pin RVE QFN (3.5 mm × 4.5 mm, 0.4 mm pitch, 1 mm height) - High thermal performance (θJA = 40.2°C/W) with exposed thermal pad. |
Pinout & Package
TPS51367RVER is housed in a 28-pin, 3.5-mm × 4.5-mm, 0.4-mm pitch, RVE QFN package with an exposed thermal pad connected to PGND. The package supports -10°C to +85°C ambient operation and features 5 PGND pins and 4 SW pins for low-inductance power routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 28) | Enable input | 1.05-V logic-compatible active-high signal; initiates soft-start sequence and full converter operation. |
| LP# (Pin 2) | Low-power mode control | Active-low input enabling ULQ™ mode; reduces IQ to 100 µA for extended battery standby. |
| MODE (Pin 3) | Frequency select | GND = 400 kHz, FLOAT = 800 kHz; sets switching frequency and corresponding unity-gain crossover (100–267 kHz). |
| TRIP (Pin 20) | Overcurrent limit programming | GND = 8 A, 5 V = 12 A, FLOAT = 16 A; configures valley-current OCL threshold for load transient safety. |
| SLEW (Pin 21) | Soft-start/integrator node | Connects to GND via external capacitor (e.g., 10 nF); sets soft-start time (tSS = VOUT × CSLEW / 10 µA) and forms integrator with internal 60 µS gm amplifier. |
| REFIN / REFIN2 (Pins 25 / 24) | Output voltage setpoint inputs | Dual-pin encoding selects fixed output (1.05 V, 1.2 V, 1.35 V, 1.5 V) or enables adjustable 0.6–2.0 V via resistor divider from 2.0-V VREF. |
| VREF (Pin 26) | 2.0-V reference output | Stable 2.0-V ±1% reference with 300 µA sourcing capability; used to bias REFIN-based voltage dividers. |
| PGOOD (Pin 1) | Power-good status indicator | Open-drain output asserting after 1.5 ms delay once VOUT reaches ±8% of target; de-asserts immediately on OVP/UVP faults. |
| GSNS (Pin 23) | Ground sense input | Connects to system ground or remote GND point to compensate for PCB trace resistance in feedback path. |
| VSNS (Pin 22) | Voltage sense input | Differential input (with GSNS) for accurate output voltage regulation; supports Kelvin sensing for tight tolerance. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ adaptive on-time control | Enables stable operation with all-MLCC output capacitors without external compensation components or loop tuning. |
| ULQ™ ultra-low quiescent current mode | Reduces operating current to 100 µA in LP#-enabled standby-critical for >1-week battery hold-up in notebook sleep states. |
| Integrated high- and low-side FETs | 15 mΩ / 7.5 mΩ RDS(on) MOSFETs eliminate external power switches and reduce BOM count and layout area by >30%. |
| Programmable soft-start timing | External capacitor on SLEW pin sets precise startup ramp (e.g., 10 nF → ~1.05 ms for 1.05 V output), preventing inrush current damage. |
| Differential voltage sensing (VSNS/GSNS) | Compensates for PCB IR drop between IC and load, maintaining ±0.5% output accuracy under dynamic load conditions. |
| Auto-skip light-load operation | Zero-crossing detection disables low-side FET at light loads, eliminating reverse inductor current and improving efficiency below 1 A. |
Applications
| DDR Memory VDDQ Rail | Notebook VCCIO Supply |
|---|---|
Use Scenario: Powering DDR3/DDR4 memory VDDQ in ultrabook platforms requiring fast transient response and tight voltage regulation. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 1.05 V / 1.2 V at up to 12 A with <1.5 ms PGOOD assertion and ±0.5% load regulation. Use Value: D-CAP2™ control ensures sub-100 ns transient recovery; integrated FETs reduce solution size by 40% vs discrete controllers. |
Use Scenario: Generating Intel platform VCCIO (1.05 V) from 7.4–20 V battery or adapter input in thin-and-light notebooks. IC Role / Device Role / Timing Role: Single-chip POL converter with ULQ™ mode enabling >30-day battery shelf life in S0ix/S3 suspend states. Use Value: 100 µA quiescent current extends standby runtime; 800 kHz operation allows 0.33 µH inductor for minimal board area. |
| Industrial Point-of-Load Converter | Embedded System Core Rail |
Use Scenario: Providing 1.35 V core supply to FPGA or SoC in ruggedized industrial controllers with wide input range. IC Role / Device Role / Timing Role: Robust 12-A buck regulator with OVP/UVP/thermal shutdown and -10°C to +85°C operation. Use Value: TRIP-pin programmable OCL (up to 16 A) accommodates peak FPGA currents; RVE package offers 20.1°C/W θJB for passive cooling. |
Use Scenario: Delivering 1.2 V to ARM-based microprocessor cores in always-on edge AI devices. IC Role / Device Role / Timing Role: High-efficiency, low-noise synchronous converter with soft-start control and PGOOD sequencing for multi-rail systems. Use Value: SLEW-capacitor programmable soft-start prevents brown-out during cold boot; PGOOD enables safe processor reset sequencing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS51367RVET | Same die, small tape-and-reel (250-unit) packaging vs large tape-and-reel (3000-unit) for TPS51367RVER. | Identical electrical and thermal performance; differs only in logistics packaging and minimum order quantity. | Select TPS51367RVET for prototyping or low-volume production; TPS51367RVER for high-volume manufacturing. |
| TPS51317RVER | Lower 6-A rating, 3–22 V input, same RVE package but no ULQ™ mode (IQ = 300 µA), fixed 400 kHz only. | Lacks ULQ™ and frequency flexibility; suitable only where 6-A max and higher quiescent current are acceptable. | Choose only if design requires lower cost and 6-A capacity suffices-no direct replacement due to missing ULQ™ and OCL headroom. |
Compared with TPS51367RVER, TPS51367RVET offers identical functionality in smaller reels for evaluation, while TPS51317RVER sacrifices ULQ™, frequency selection, and 12-A capability for cost reduction-making it unsuitable for battery-sensitive or high-current DDR applications.
Availability
TPS51367RVER is available at Aetrix Electronics and suitable for notebook VCCIO, DDR VDDQ, industrial POL, embedded core rail, and FPGA auxiliary supply applications requiring stable component supply, long-term lifecycle support, and TI-qualified automotive-grade reliability.
Supply support for TPS51367RVER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and notebook power architecture.
The TPS51367RVER belongs to TI's high-voltage, high-current integrated FET buck converter product line, engineered specifically for DDR memory and CPU I/O rail applications demanding ultra-low quiescent current, fast transient response, and minimal external component count.
FAQ
What is the ULQ™ mode function of the TPS51367RVER, and how is it enabled?
The ULQ™ (Ultra-Low Quiescent) mode reduces the TPS51367RVER's operating current to 100 µA during system standby. It is enabled by asserting the LP# pin low (≤0.35 V). This feature directly extends battery life in notebook S0ix/S3 states. The TPS51367RVER maintains full regulation and fast wake-up capability while in ULQ™ mode, with no change to output voltage or protection behavior.
How does the TPS51367RVER achieve stable regulation with all-MLCC output capacitors?
The TPS51367RVER uses TI's D-CAP2™ adaptive on-time control architecture, which incorporates an internal transconductance amplifier (60 µS) and SLEW capacitor integrator to sense inductor current ripple and dynamically adjust on-time. This eliminates the need for external compensation components and ensures stability with ultra-low-ESR MLCC-only output networks-unlike traditional voltage-mode or current-mode controllers.
What are the valid output voltage options for the TPS51367RVER, and how are they selected?
The TPS51367RVER supports fixed outputs of 1.05 V, 1.2 V, 1.35 V, and 1.5 V via REFIN/REFIN2 pin combinations (GND/GND, FLOAT/GND, FLOAT/FLOAT, GND/FLOAT), or adjustable 0.6–2.0 V using a resistor divider from the 2.0-V VREF pin. Selection occurs at power-up; no reconfiguration is possible during operation. The TPS51367RVER's VREF pin provides a precision 2.0-V ±1% reference with 300 µA sourcing capability.
How is overcurrent protection configured on the TPS51367RVER, and what are the trip thresholds?
Overcurrent protection on the TPS51367RVER is configured via the TRIP pin: grounding TRIP sets 8 A typical OCL, applying 5 V sets 12 A, and leaving TRIP floating sets 16 A. Protection uses valley-current detection during low-side FET conduction and includes negative OCL for OOB/OVP discharge events. The TPS51367RVER also integrates temperature-compensated RDS(on) sensing for accurate current measurement across temperature.
What thermal performance can be expected from the TPS51367RVER in a standard 4-layer PCB layout?
In a standard 4-layer PCB with 2 oz copper, 6 thermal vias under the exposed pad, and 1-in² 2-oz copper pour, the TPS51367RVER achieves θJA ≈ 40.2°C/W and θJB ≈ 20.1°C/W. At 12 A output and 12 V input, junction temperature rise is typically <45°C above ambient-well within the 150°C absolute maximum. The RVE package's low 1-mm height and thermal pad ensure reliable operation without forced air in most notebook and industrial applications.
TPS51367RVER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™
- Package/Case:
- 28-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Programmable)
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 22V
- Voltage - Output (Min/Fixed):
- 0.6V (1.05V, 1.2V, 1.35V, 1.5V)
- Voltage - Output (Max):
- 2V
- Current - Output:
- 12A
- Frequency - Switching:
- 400kHz, 800kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -10°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-VQFN-CLIP (4.5x3.5)
TPS51367RVER FAQ
1.How can I place an order for TPS51367RVER through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS51367RVER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS51367RVER reliable?
The price and inventory of TPS51367RVER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS51367RVER is usually 5 days.
3.What payment methods are accepted for TPS51367RVER?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS51367RVER transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS51367RVER?
TPS51367RVER orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS51367RVER order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS51367RVER?
For technical support, including TPS51367RVER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS51367RVER requirements.
6.How does Aetrix verify that TPS51367RVER is sourced from the original manufacturer or authorized distributors?
All TPS51367RVER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS51367RVER meets industry standards.
7.What is the process for return or replacement of TPS51367RVER?
All TPS51367RVER units undergo pre-shipment inspection (PSI). If there is an issue with TPS51367RVER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS51367RVER part is unused and in its original packaging.
Return procedure for TPS51367RVER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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