Texas Instruments TPS53355DQPR
- Part No.:
- TPS53355DQPR
- Manufacturer:
- Texas Instruments
- Package:
- 22-PowerLFDFN
- Datasheet:
-
TPS53355DQPR.pdf
- Description:
- IC REG BUCK ADJ 30A 22LSON-CLIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,407
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Product details
Overview
TPS53355DQPR from Texas Instruments is a D-CAP™ mode, 30-A synchronous step-down DC-DC converter with integrated NexFET™ power MOSFETs (5 mΩ high-side / 2 mΩ low-side), 0.6 V to 5.5 V output range, 1.5 V–15 V conversion input voltage, and Eco-mode™ for light-load efficiency. It delivers enterprise-grade power to ASIC, FPGA, and SoC core rails in space-constrained server and networking systems.
For engineers reviewing the TPS53355DQPR datasheet, TPS53355DQPR pinout, TPS53355DQPR application, or TPS53355DQPR equivalent, key selection criteria include its 22-pin QFN package with PowerPAD™, selectable 250 kHz–1 MHz switching frequency via RF pin resistor, auto-skip vs. forced CCM operation via MODE pin, and integrated 5-V LDO on VREG pin for internal biasing.
Technical Context
The TPS53355DQPR implements adaptive on-time D-CAP™ control-using output capacitor ESR for current sensing-eliminating external compensation components while enabling ultra-fast transient response. Its architecture supports pre-biased start-up and integrates a bootstrap switch for high-side gate drive.
Control logic includes dual-mode operation (auto-skip for efficiency at light load, FCCM for ripple suppression), programmable soft-start (0.7–5.6 ms via MODE pin resistor), and thermal-compensated overcurrent protection set by TRIP pin current (10 µA ±0.6 µA at 25°C, 4700 ppm/°C TC).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 30 A continuous - supports high-current digital loads without external current sharing. |
| Input Voltage Range | 1.5 V to 15 V conversion input - enables direct use with intermediate bus voltages like 3.3 V, 5 V, or 12 V. |
| Output Voltage Range | 0.6 V to 5.5 V - covers modern CPU/GPU core, I/O, and auxiliary rail requirements with 1% reference accuracy. |
| Switching Frequency | 250 kHz to 1 MHz - selected externally via RF pin resistor; higher frequencies reduce inductor size, lower frequencies improve light-load efficiency. |
| Efficiency | Up to 96% - achieved using integrated low-RDS(on) MOSFETs and Eco-mode™ skip cycling at light load. |
| Shutdown Current | < 10 µA - enables ultra-low-power system standby states without compromising wake-up latency. |
| Thermal Protection | 145°C shutdown with 10°C hysteresis - prevents latch-up during sustained overload or airflow loss in dense PCB layouts. |
Pinout & Package
TPS53355DQPR is housed in a 6.0 mm × 5.0 mm, 22-pin LSON-CLIP (QFN) package with exposed PowerPAD™ thermal pad for enhanced heat dissipation. The package is RoHS-compliant and optimized for high-current, high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pins 12–17) | Main power input | Six parallel VIN pins reduce trace resistance and inductance; support up to 15 V input with 1.5 V minimum for low-voltage intermediate bus operation. |
| VFB (Pin 1) | Feedback input | Connects to resistor divider from VOUT; regulates output with ±0.5% initial accuracy and 1% total tolerance over temp/load. |
| EN (Pin 2) | Enable control | Active-high logic input (1.2 V turn-on threshold); controls startup sequence and synchronizes with system power sequencing. |
| PGOOD (Pin 3) | Power-good flag | Open-drain output with 1-ms delay after regulation; signals stable output to host controller or sequencer. |
| VBST (Pin 4) | Bootstrap supply | Drives high-side FET gate; requires external capacitor to LL node; enables efficient 100% duty-cycle capability. |
| TRIP (Pin 21) | OCP threshold setting | Sets current limit via sourced current (10 µA @ 25°C); VOCL = VTRIP/32 allows precise, thermally compensated OCL tuning. |
| RF (Pin 22) | Frequency selection | Resistor-to-GND or VREG sets switching frequency; eight discrete values supported (250 kHz–1 MHz) without oscillator drift. |
| MODE (Pin 20) | Operation mode control | Selects auto-skip (Eco-mode™) or FCCM and configures soft-start time (0.7/1.4/2.8/5.6 ms) via resistor value. |
| VREG (Pin 18) | Integrated 5-V LDO output | Supplies internal analog/digital circuitry and gate drivers; delivers up to 30 mA with 230 mV dropout at full load. |
| GND (PowerPad™) | Ground & thermal path | Exposed thermal pad must be soldered to PCB ground plane with ≥6 thermal vias for θJB = 5.9°C/W performance. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP™ control mode | ESR-based current sensing eliminates need for external compensation network - reduces BOM count and layout sensitivity. |
| Eco-mode™ auto-skip | Disables switching pulses under light load - cuts quiescent current to <10 µA and maintains >85% efficiency at 100 mA output. |
| Integrated 5-V LDO (VREG) | Self-powered internal bias rail - removes need for external 5-V supply and simplifies multi-rail power tree design. |
| Pre-biased start-up | Supports powered-up output capacitors - prevents reverse current flow during hot-insertion or partial-system power-up sequences. |
| All-ceramic capacitor support | Stable with zero-ESR MLCCs - enables compact, low-profile designs without electrolytic or tantalum bulk capacitance. |
Applications
| Enterprise Server Core Rail | Networking Switch ASIC Supply |
|---|---|
Use Scenario: Powers 1.1-V/25-A core voltage of Intel Xeon or AMD EPYC processors in 1U rack servers with strict thermal envelope. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering tightly regulated, low-noise core power with sub-100-ns transient response. Use Value: Enables dynamic voltage/frequency scaling (DVFS) without output droop, leveraging D-CAP™ control and 30-A integrated MOSFETs. | Use Scenario: Supplies 1.2-V/20-A I/O and SerDes rails for Broadcom Tomahawk or Marvell Prestera switches in 10/25/100 GbE top-of-rack deployments. IC Role / Device Role / Timing Role: High-efficiency point-of-load converter with programmable soft-start to coordinate with multi-phase sequencing controllers. Use Value: Reduces board area by 40% versus discrete solutions and meets EN55022 Class B EMI limits via controlled slew-rate gate drivers. |
| FPGA Core Voltage Regulation | SoC Power Delivery for AI Accelerators |
Use Scenario: Delivers 0.85-V/18-A core voltage to Xilinx Versal or Intel Agilex FPGAs in edge inference platforms with limited airflow. IC Role / Device Role / Timing Role: Single-chip buck converter with thermal-compensated OCP and open-drain PGOOD for FPGA configuration handshaking. Use Value: Maintains regulation during rapid load steps (0→15 A in 2.5 A/ms) with <±15 mV deviation, avoiding FPGA configuration faults. | Use Scenario: Powers 0.75-V/30-A core rail of NVIDIA A100 or AMD MI250X GPU accelerators in AI training servers with dual 12-V input sources. IC Role / Device Role / Timing Role: High-current, low-VOUT synchronous buck with six parallel VIN pins to handle high di/dt and minimize IR drop. Use Value: Achieves 94.5% peak efficiency at 1.0 V/20 A (VIN=12 V), reducing thermal load by 3.2 W versus comparable 20-A solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMZ31530RNNR | Integrated module (TPS53355 + inductor + passives) in 15×16×5.8-mm QFN; fixed 14.5-V max input; no external frequency or soft-start adjustment. | Targeted at rapid prototyping and space-constrained modules where layout time > component cost; lacks pin-level control flexibility. | Choose LMZ31530RNNR when board area is critical and design cycle time must be minimized - not for fine-grained loop tuning or multi-rail coordination. |
| TPS53689RTAR | 60-A dual-phase controller (no integrated MOSFETs); supports 3.0–20-V input; requires external DrMOS or power stages; 0.5% reference accuracy. | Designed for higher-current, multi-phase CPU/GPU VRMs requiring phase interleaving and telemetry; not a drop-in replacement. | Choose TPS53689RTAR only when >30-A output or phase multiplexing is required - adds complexity but enables tighter voltage margins and telemetry. |
Compared with LMZ31530RNNR and TPS53689RTAR, the TPS53355DQPR provides optimal balance of integration, configurability, and thermal performance for single-rail 30-A applications - offering full pin-level control without module-level footprint penalties or controller-level external component overhead.
Availability
TPS53355DQPR is available at Aetrix Electronics and suitable for enterprise servers, wired networking switches, and FPGA/ASIC power delivery requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS53355DQPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC-DC conversion.
The TPS53355DQPR belongs to TI's SWIFT™ synchronous buck converter family, engineered for high-current, low-voltage point-of-load applications in computing infrastructure where fast transient response, small solution size, and reliability are mandatory.
FAQ
What is the maximum recommended junction temperature for continuous operation of the TPS53355DQPR?
The TPS53355DQPR has a thermal shutdown threshold of 145°C with 10°C hysteresis. For reliable continuous operation, TI specifies a maximum junction temperature of 125°C under recommended operating conditions. This limit ensures long-term reliability and avoids derating of MOSFET RDS(on) or reference voltage accuracy. The device's θJB = 5.9°C/W enables this rating with proper PCB thermal design using the PowerPAD™ and ≥6 thermal vias to solid ground planes.
Does the TPS53355DQPR support pre-biased output capacitor start-up, and how is it enabled?
Yes, the TPS53355DQPR supports pre-biased start-up - meaning it can safely ramp up output voltage even when the output capacitor is already charged. This behavior is inherent to its control architecture and requires no external enable signal or configuration. During start-up, the device monitors the VFB pin and disables high-side switching until VFB falls below ~90% of target, preventing reverse current flow into the pre-charged rail - critical for hot-swap and multi-rail sequencing in servers and switches.
How does the TRIP pin on the TPS53355DQPR set overcurrent protection, and what is its temperature coefficient?
The TRIP pin on the TPS53355DQPR sources a precision current (10.0 µA ±0.6 µA at 25°C) that sets the overcurrent limit threshold as VOCL = VTRIP/32. With VTRIP ranging from 0.4 V to 2.4 V, VOCL spans 12.5 mV to 75 mV. Its temperature coefficient is +4700 ppm/°C, ensuring proportional scaling of current limit with junction temperature - maintaining safe SOA across –40°C to +125°C ambient without external compensation.
Can the TPS53355DQPR operate with only a single 12-V input rail, or does it require separate VIN and VDD supplies?
The TPS53355DQPR supports single-rail operation: a 12-V source can be connected to both VIN (pins 12–17) and VDD (pin 19), satisfying both the 1.5–15-V conversion input and 4.5–25-V bias supply requirements. This simplifies power tree design in systems where only one intermediate bus is available. However, separating VIN and VDD (e.g., 5-V VDD with 12-V VIN) improves light-load efficiency by reducing VDD-related quiescent current.
What is the purpose of the VREG pin on the TPS53355DQPR, and what load can it drive?
The VREG pin on the TPS53355DQPR outputs a regulated 5-V supply generated by an internal LDO, used to power the device's analog circuitry, gate drivers, and internal logic. It delivers up to 30 mA with ≤230 mV dropout at full load and is controlled by the EN pin - activating when VDD exceeds ~2 V. This eliminates the need for an external 5-V bias rail, reducing system BOM and simplifying bring-up in multi-converter designs.
TPS53355DQPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP™, Eco-Mode™
- Package/Case:
- 22-PowerLFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 1.5V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 30A
- Frequency - Switching:
- 250kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 22-LSON-CLIP (6x5)
TPS53355DQPR FAQ
1.How can I place an order for TPS53355DQPR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS53355DQPR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS53355DQPR reliable?
The price and inventory of TPS53355DQPR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS53355DQPR is usually 5 days.
3.What payment methods are accepted for TPS53355DQPR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS53355DQPR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS53355DQPR?
TPS53355DQPR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS53355DQPR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS53355DQPR?
For technical support, including TPS53355DQPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS53355DQPR requirements.
6.How does Aetrix verify that TPS53355DQPR is sourced from the original manufacturer or authorized distributors?
All TPS53355DQPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS53355DQPR meets industry standards.
7.What is the process for return or replacement of TPS53355DQPR?
All TPS53355DQPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS53355DQPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS53355DQPR part is unused and in its original packaging.
Return procedure for TPS53355DQPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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