Texas Instruments TPS53626RSMT
- Part No.:
- TPS53626RSMT
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
TPS53626RSMT.pdf
- Description:
- IC REG CTRLR VR13 1OUT 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:805
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS53626RSMT from Texas Instruments is a 3- to 5-phase synchronous buck controller IC designed for high-current CPU/GPU VR applications, supporting up to 120 A total output with adaptive on-time D-CAP3 control, 4.5–24 V input voltage range, and integrated MOSFET drivers. It operates from –40°C to 105°C and features PMBus 1.3 compliance for telemetry and configuration.
For engineers reviewing the TPS53626RSMT datasheet, TPS53626RSMT pinout, TPS53626RSMT application, or TPS53626RSMT equivalent, key selection criteria include multi-phase phase-interleaved operation, VR13/IMVP8 compatibility, programmable loop compensation via PMBus, thermal monitoring with remote diode sensing, and support for both discrete and integrated power stages.
Technical Context
The TPS53626RSMT implements a digital multi-phase buck controller architecture with D-CAP3 modulation, enabling fast transient response without external compensation components. It supports up to five phases with automatic phase shedding and interleaving to reduce input/output ripple and improve efficiency.
It integrates dual-loop thermal sensing (die temperature + remote diode), PMBus 1.3 interface for real-time voltage/current/temperature reporting, and configurable fault responses including OCP, UVP, OVP, and thermal shutdown with programmable thresholds.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 24 V - supports wide-input industrial and server VR rails powered from 5 V, 12 V, or 19 V intermediate buses. |
| Output Voltage Range | 0.25 V to 1.52 V in 1-mV steps - compliant with VR13/IMVP8 specifications for modern CPUs and GPUs. |
| Max Output Current | 120 A total - scalable across 3–5 phases with current balancing and dynamic phase add/drop. |
| Control Method | D-CAP3 adaptive on-time - enables zero external compensation, sub-100 ns load-step response, and stable operation with ceramic output capacitors. |
| Interface | PMBus 1.3 - enables full telemetry (VOUT, IOUT, TEMP), configuration (VID, margins, OCP), and fault logging in production and field environments. |
| Operating Temp | –40°C to 105°C - qualified for extended-temperature server, networking, and AI accelerator board deployments. |
| Package | VQFN-32 (RSM), 4 mm × 4 mm, 0.4 mm pitch - thermally enhanced with exposed pad for PCB heat sinking and low-inductance layout. |
Pinout & Package
VQFN-32 (RSM) package: 4 mm × 4 mm body, 0.4 mm pitch, 1 mm max height, thermally enhanced with exposed copper pad soldered to PCB ground plane for thermal dissipation and EMI reduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN | Power Input | Primary input supply (4.5–24 V) for controller logic and gate drivers; requires local bulk and high-frequency decoupling. |
| VDDIO | I/O Supply | 3.3-V bias rail for PMBus interface and digital logic; must be regulated and filtered independently from VIN. |
| PHASEx | Gate Driver Output | Five dedicated high-side/low-side gate drive outputs (PHASE1–PHASE5); each drives external N-channel MOSFET pairs in interleaved buck topology. |
| FBx | Feedback Input | Per-phase voltage feedback node; used with resistor dividers to set output voltage and enable per-phase current sensing. |
| TEMP_SENS | Thermal Sense | Inputs remote diode (CPU/GPU die) and internal sensor; enables dual-point thermal protection and dynamic thermal throttling. |
| SCL/SDA | PMBus Interface | Standard SMBus-compatible two-wire interface for configuration, telemetry, and fault reporting under PMBus 1.3 protocol. |
| EN | Enable Input | Active-high logic input controlling global device startup; supports sequencing with other VRs via power-good coordination. |
| PGOOD | Power-Good Output | Open-drain status signal indicating regulated output within ±1% tolerance and no active faults. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP3 Control Architecture | Eliminates need for external compensation network while maintaining stability across wide capacitor ESR ranges and load transients. |
| 5-Phase Scalability | Supports 3-, 4-, or 5-phase configurations via pin-strapping; enables optimal trade-off between efficiency, ripple, and component count for 60–120 A loads. |
| PMBus 1.3 Compliance | Enables full digital control including margining, adaptive voltage positioning (AVP), real-time telemetry, and black-box fault logging for system validation. |
| Integrated Thermal Monitoring | Simultaneous measurement of controller junction temperature and remote diode (e.g., CPU/GPU die), with independent over-temperature thresholds and shutdown actions. |
| Adaptive Phase Shedding | Automatically reduces active phase count under light load to maintain >90% efficiency at <10% load, reducing switching losses and improving light-load PSRR. |
Applications
| AI Accelerator Power Delivery | Server CPU Voltage Regulator |
|---|---|
Use Scenario: High-density AI training cards requiring rapid load steps (>50 A/µs) and tight voltage regulation (±3 mV) across multiple GPU dies. IC Role / Device Role / Timing Role: Primary multi-phase VR controller managing five parallel buck stages with D-CAP3 loop and PMBus telemetry. Use Value: Sub-100 ns transient response and per-phase current balancing ensure stable core voltage during burst-mode inference workloads. | Use Scenario: Dual-socket x86 server motherboard delivering 100+ A to each CPU under AVX-512 and turbo boost conditions. IC Role / Device Role / Timing Role: IMVP8-compliant VR controller coordinating with CPU VID signals and providing real-time thermal headroom data via PMBus. Use Value: Adaptive phase shedding and remote diode sensing extend thermal headroom by dynamically adjusting voltage based on CPU die temperature. |
| High-Performance Networking ASIC | Edge AI Inference Module |
Use Scenario: 400G/800G switch line card with FPGA and SerDes arrays demanding low-noise, tightly regulated 0.8 V rails. IC Role / Device Role / Timing Role: Low-noise multi-phase controller using interleaved switching and ceramic output caps to minimize output ripple below 10 mVpp. Use Value: D-CAP3 modulation and optimized gate drive timing reduce switching noise coupling into high-speed serial links. | Use Scenario: Fanless edge AI box with thermal constraints requiring dynamic voltage/frequency scaling (DVFS) coordinated across CPU and NPU. IC Role / Device Role / Timing Role: Programmable VR controller interfacing with SoC's PMBus host to adjust output voltage in real time based on workload and temperature. Use Value: PMBus-configurable AVP and thermal throttling enable precise power capping without firmware updates or hardware changes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-phase buck controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ISL91302BIRZ-T7A | 4-phase, 3–14 V input, analog-based R3 control; no PMBus, only I²C for basic config; max 80 A. | Lacks telemetry, phase shedding, and VR13 compliance; suited for cost-sensitive embedded SoC rails, not CPU/GPU VR. | Select when digital telemetry and IMVP8 compliance are unnecessary and analog simplicity is preferred. |
| MP2960GQ-Z | 5-phase, 4.5–24 V, PMBus 1.3, but uses analog voltage-mode control with external compensation; no D-CAP3. | Requires external RC network for loop tuning; slower transient response than TPS53626RSMT; supports VR13 but not IMVP8 VID mapping. | Choose when legacy analog design flow and fixed compensation are acceptable, and D-CAP3 is not required. |
Compared with ISL91302BIRZ-T7A and MP2960GQ-Z, the TPS53626RSMT delivers superior transient performance via D-CAP3, full VR13/IMVP8 compliance, and integrated thermal telemetry-making it the preferred choice for high-end CPU/GPU and AI accelerator VR designs where digital control and telemetry are critical.
Availability
TPS53626RSMT is available at Aetrix Electronics and suitable for AI accelerator power delivery, server CPU voltage regulation, and high-performance networking ASIC applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS53626RSMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power conversion solutions.
The TPS536xx family is designed specifically for high-current, digitally controlled multiphase VR applications in datacenter CPUs, GPUs, FPGAs, and AI accelerators-emphasizing PMBus telemetry, thermal intelligence, and adaptive control.
FAQ
What is the maximum number of phases supported by the TPS53626RSMT?
The TPS53626RSMT supports up to five phases, configurable as 3-, 4-, or 5-phase operation via pin-strapping. Each phase drives an external high-side/low-side MOSFET pair, enabling scalable current delivery up to 120 A with interleaved switching to reduce input/output ripple and improve thermal distribution across the PCB. The TPS53626RSMT automatically manages phase shedding and adding based on load demand.
Does the TPS53626RSMT require external compensation components?
No, the TPS53626RSMT uses D-CAP3 adaptive on-time control, which eliminates the need for external compensation components such as resistors and capacitors in the feedback loop. This architecture maintains stability across varying output capacitor types and ESR values while delivering fast transient response-typically under 100 ns for large load steps. The TPS53626RSMT achieves this through internal digital loop calibration and adaptive timing adjustment.
What thermal sensing capabilities does the TPS53626RSMT provide?
The TPS53626RSMT integrates dual thermal sensing: an internal die temperature sensor and a remote diode interface for direct CPU/GPU die temperature monitoring. Both sensors feed into independent over-temperature comparators with programmable thresholds via PMBus. The TPS53626RSMT can trigger thermal throttling or shutdown based on either sensor, enabling precise thermal management in high-power AI and server applications.
Is the TPS53626RSMT compatible with VR13 and IMVP8 standards?
Yes, the TPS53626RSMT is fully compliant with both VR13 and IMVP8 specifications. It supports standard VID codes, adaptive voltage positioning (AVP), and dynamic voltage identification protocols required by modern Intel and AMD processors. The TPS53626RSMT implements all mandatory timing, sequencing, and telemetry requirements-including PMBus register mapping-for seamless integration into certified server and desktop platforms.
What package type and mounting requirements apply to the TPS53626RSMT?
The TPS53626RSMT uses a VQFN-32 (RSM) package: 4 mm × 4 mm, 0.4 mm pitch, with an exposed thermal pad. The pad must be soldered to a PCB copper pour connected to ground for thermal and mechanical integrity. TI recommends using vias under the pad (filled or tented) and following the land pattern and stencil design guidelines in SLUA271 to ensure reliable reflow and thermal performance. The TPS53626RSMT is rated MSL-2-260°C.
TPS53626RSMT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP+™
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Controller, Intel VR13
- Voltage - Input:
- 0.25V ~ 1.52V
- Number of Outputs:
- 1
- Voltage - Output:
- 4.5V ~ 28V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (4x4)
TPS53626RSMT FAQ
1.How can I place an order for TPS53626RSMT through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS53626RSMT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS53626RSMT reliable?
The price and inventory of TPS53626RSMT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS53626RSMT is usually 5 days.
3.What payment methods are accepted for TPS53626RSMT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS53626RSMT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS53626RSMT?
TPS53626RSMT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS53626RSMT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS53626RSMT?
For technical support, including TPS53626RSMT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS53626RSMT requirements.
6.How does Aetrix verify that TPS53626RSMT is sourced from the original manufacturer or authorized distributors?
All TPS53626RSMT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS53626RSMT meets industry standards.
7.What is the process for return or replacement of TPS53626RSMT?
All TPS53626RSMT units undergo pre-shipment inspection (PSI). If there is an issue with TPS53626RSMT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS53626RSMT part is unused and in its original packaging.
Return procedure for TPS53626RSMT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS53626RSMT Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

