Texas Instruments TPS54120RGYR

Overview

TPS54120RGYR from Texas Instruments is a low-noise, 1-A integrated power supply combining a current-mode synchronous buck DC-DC converter and a wide-bandwidth LDO regulator in a single QFN-24 package. It delivers ultra-low output noise (17 µVRMS, 100 Hz–1 MHz), supports 4.5 V to 17 V input, provides adjustable LDO output from 0.8 V to 6.0 V, and operates across –40°C to +125°C junction temperature - enabling clean power for RF receivers, high-speed ADCs, and precision clocking circuits.

For engineers reviewing the TPS54120RGYR datasheet, TPS54120RGYR pinout, TPS54120RGYR application, or TPS54120RGYR equivalent, key selection considerations include its dual-stage architecture (buck + LDO), 17 µVRMS noise performance, 200 kHz–1.2 MHz synchronizable switching frequency, integrated power-good signaling, and thermal pad–enabled thermal management in the 3.5 mm × 5.5 mm RGY package.

Technical Context

The TPS54120RGYR implements a current-mode controlled buck converter followed by a high-PSRR LDO stage, with independent enable control (EN for buck, LDOEN for LDO) and separate input rails (VIN for control logic, PVIN for power switches). Its error amplifier (g_M = 1300 µ℧) drives COMP to regulate both stages, while VSENSE and FB pins provide dedicated feedback paths for buck and LDO outputs respectively.

It features cycle-by-cycle overcurrent protection on both high-side (ILIM_HS = 4.2–6.2 A) and low-side MOSFETs, thermal shutdown at +160°C, programmable soft-start via SS pin (2.3 µA charge current), and noise reduction via NR pin with external capacitor. The device supports external clock synchronization and offers configurable UVLO thresholds on EN and PVIN pins.

Key Specifications

Pinout & Package

TPS54120RGYR is housed in a thermally enhanced 3.5 mm × 5.5 mm QFN-24 package (RGY) with an exposed thermal pad. The pad must be soldered to a large GND plane for optimal thermal performance and noise suppression.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-stage low-noise power supply applications.

Compared with TPS7A4701RGWR and LM27762DSGR, the TPS54120RGYR uniquely integrates buck regulation and LDO in one package with programmable frequency, full enable control, and 1-A capability - making it the only option that simultaneously satisfies high current, low noise, and design simplicity for RF and precision analog systems.

Availability

TPS54120RGYR is available at Aetrix Electronics and suitable for telecom infrastructure, professional audio equipment, and test & measurement instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for TPS54120RGYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power solutions.

The TPS54120RGYR belongs to TI's low-noise integrated power management product line, designed specifically to replace multi-component discrete buck+LDO designs in RF, audio, and precision analog applications where PSRR, noise, and board space are critical constraints.

FAQ

What is the maximum continuous output current of the TPS54120RGYR?

The TPS54120RGYR delivers 1-A continuous current from its LDO output stage. This rating assumes proper thermal management - including soldering the exposed thermal pad to a minimum 100 mm² copper area - and operation within the specified junction temperature range (–40°C to +125°C). The integrated buck stage supports higher peak currents (up to 6.2 A high-side limit), but the LDO output is thermally limited to 1 A under typical conditions.

How does the TPS54120RGYR achieve ultra-low output noise?

The TPS54120RGYR achieves 17 µVRMS (100 Hz–1 MHz) noise through three integrated mechanisms: (1) a high-PSRR LDO stage optimized for wideband ripple rejection, (2) an external NR pin capacitor that filters high-frequency noise and slows LDO soft-start, and (3) internal design techniques including separate feedback paths (VSENSE for buck, FB for LDO) and low-noise bandgap reference. These features are validated across temperature and load in TI's SBVS180C datasheet.

Can the TPS54120RGYR operate with split input rails?

Yes, the TPS54120RGYR supports split input rails: VIN (4.5–17 V) powers control circuitry, while PVIN (1.6–17 V) supplies the power switches. This allows configurations such as 5 V for logic and 12 V for the buck stage. The EN pin UVLO can be adjusted independently for each rail using resistor dividers. However, boot capacitor charging requires (VIN – PVIN) > 4 V to maintain BOOT–PH > 2.1 V for 100% duty cycle operation.

What is the purpose of the NR pin on the TPS54120RGYR?

The NR (Noise Reduction) pin on the TPS54120RGYR connects to an external capacitor to ground, forming an RC filter that reduces high-frequency output noise and slows the LDO output voltage ramp during startup. A 0.01 µF capacitor yields 17 µVRMS noise (100 Hz–1 MHz); increasing capacitance further lowers noise but extends startup time. This pin directly tunes the trade-off between noise performance and system initialization speed in the TPS54120RGYR.

Does the TPS54120RGYR include built-in protection features?

Yes, the TPS54120RGYR includes comprehensive protection: cycle-by-cycle overcurrent limiting on both high-side (4.2–6.2 A) and low-side MOSFETs, thermal shutdown at +160°C with +20°C hysteresis, input undervoltage lockout on VIN (4.0–4.5 V), output overvoltage protection on the buck stage, and open-drain PWRGD signaling for system-level fault monitoring. All protections are fully integrated and require no external components.