Texas Instruments TPS54120RGYT

Overview

TPS54120RGYT from Texas Instruments is a low-noise, 1-A integrated power supply combining a current-mode step-down DC-DC converter and a high-PSR LDO regulator in a single QFN-24 package. It delivers ultra-low-noise output (17 µVRMS, 100 Hz–1 MHz), supports 4.5 V–17 V input, provides adjustable 0.8 V–6.0 V LDO output, and operates across –40°C to +125°C junction temperature - ideal for powering RF receivers, ADCs, and clock distribution circuits.

For engineers reviewing the TPS54120RGYT datasheet, TPS54120RGYT pinout, TPS54120RGYT application, or TPS54120RGYT equivalent, this page details its dual-stage architecture, noise-reduction design methodology, thermal performance in QFN-24, and verified alternative options for low-noise power rail substitution in telecom and precision analog systems.

Technical Context

The TPS54120RGYT implements a two-stage regulation architecture: a current-mode synchronous buck converter (with 200 kHz–1.2 MHz programmable switching frequency via RT/CLK) feeds an independent, wide-bandwidth LDO stage. The LDO features dedicated NR pin for external capacitor-based noise filtering and achieves >80 dB PSRR at 1 kHz with ≥0.8 V dropout.

Its control loop integrates soft-start (SS pin), power-good monitoring (PWRGD open-drain), and thermal shutdown (+160°C trip). The device supports split-rail operation (VIN/PVIN separation), 100% duty-cycle capability under boot voltage constraints, and cycle-by-cycle overcurrent protection on both high-side (4.2–6.2 A) and low-side MOSFETs.

Key Specifications

Pinout & Package

TPS54120RGYT is housed in a thermally enhanced 3.5 mm × 5.5 mm QFN-24 package (RGY) with exposed thermal pad connected to LDO GND. Pin assignment follows TI's standard layout for optimal noise isolation between power, control, and LDO sections.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-noise dual-stage power supply applications.

Compared with TPS7A8300RGRT and LM27762DSGR, the TPS54120RGYT uniquely integrates buck + LDO in one package with verified 17 µVRMS noise and 1-A capability - eliminating inter-stage layout sensitivity and enabling faster design iteration for noise-critical RF and precision analog systems.

Availability

TPS54120RGYT is available at Aetrix Electronics and suitable for telecom infrastructure, professional audio equipment, and test & measurement instrumentation requiring stable component supply and long-term production continuity.

Supply support for TPS54120RGYT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management ICs and high-reliability industrial solutions.

The TPS54120 belongs to TI's low-noise integrated power supply product line, engineered specifically for RF, high-speed data conversion, and precision analog applications where switching noise must be suppressed without sacrificing efficiency or thermal performance.

FAQ

What is the maximum continuous output current supported by the TPS54120RGYT?

The TPS54120RGYT delivers 1-A continuous current from its integrated LDO output stage. This rating is validated across the full –40°C to +125°C junction temperature range with proper PCB thermal design (θJA ≤ 45.1°C/W) and ≥4.7 µF output capacitance. The upstream DC-DC converter supports higher peak currents (up to 6.2 A high-side limit), but LDO output is thermally and electrically limited to 1 A for sustained operation.

How does the NR pin reduce output noise in the TPS54120RGYT?

The NR pin on the TPS54120RGYT connects to an external capacitor that forms a low-pass filter for the LDO's internal error amplifier. Adding a 0.1 µF capacitor reduces broadband noise by 3–5 µVRMS across 100 Hz–1 MHz and slows the LDO soft-start ramp, preventing undershoot during turn-on. This feature is unique to the TPS54120RGYT among TI's dual-stage regulators and directly enables its 17 µVRMS specification.

Can the TPS54120RGYT operate with separate VIN and PVIN supplies?

Yes, the TPS54120RGYT supports split-rail operation: VIN (pins 11, 15) powers control circuitry (4.5 V–17 V), while PVIN (pins 9, 10) supplies the power switches (1.6 V–17 V). This allows using a lower-voltage, low-noise source for control logic while maintaining high-efficiency conversion from a higher bus - a key advantage in mixed-signal systems where digital noise must be isolated from analog regulation paths.

What is the purpose of the PWRGD pin on the TPS54120RGYT?

The PWRGD pin on the TPS54120RGYT is an open-drain output that asserts low during DC-DC startup, undervoltage, overvoltage, thermal shutdown, or EN disable. Its threshold is tied to 94% and 91% of the internal 0.8-V reference, ensuring precise sequencing with downstream FPGAs, ADCs, or microcontrollers. Unlike general-purpose reset signals, PWRGD reflects only DC-DC health - the LDO remains active even if PWRGD is low, enabling graceful degradation in multi-rail systems.

Does the TPS54120RGYT require external compensation components?

No, the TPS54120RGYT uses internal compensation for both the DC-DC and LDO control loops. External components are limited to passive elements: BOOT–PH capacitor (0.1 µF), SS and NR timing capacitors, feedback resistors (R4/R5 for LDO, R1/R2 for DC-DC), and output capacitors. This simplifies layout, eliminates tuning iterations, and ensures consistent noise and transient performance across production units - a critical benefit for high-volume telecom and instrumentation designs.