Texas Instruments TPS54226PWP
- Part No.:
- TPS54226PWP
- Manufacturer:
- Texas Instruments
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54226PWP.pdf
- Description:
- IC REG BUCK ADJ 2A 14HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:225
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Product details
Overview
TPS54226PWP from Texas Instruments is a 2-A synchronous step-down DC/DC converter with integrated 160 mΩ high-side and 110 mΩ low-side N-channel MOSFETs, D-CAP2™ adaptive on-time control, and Auto-Skip Eco-Mode™ for light-load efficiency. It operates from 4.5 V to 18 V VCC and 2 V to 18 V VIN, delivers adjustable output from 0.76 V to 5.5 V, and targets digital TV, Blu-ray players, and STB power rails.
For engineers reviewing the TPS54226PWP datasheet, TPS54226PWP pinout, TPS54226PWP application, or TPS54226PWP equivalent, this page delivers verified electrical parameters, HTSSOP-14 PowerPAD™ package details, D-CAP2™ transient response behavior, Eco-Mode™ efficiency trade-offs, and validated alternative buck converters for industrial and consumer power design.
Technical Context
The TPS54226PWP implements D-CAP2™ mode control-combining adaptive on-time PWM with internal ripple injection-to achieve fast load transient response without external compensation. Its on-time is inversely proportional to VIN and proportional to VOUT, yielding pseudo-constant 700 kHz switching across input voltage range.
Eco-Mode™ enables seamless transition from continuous conduction mode (CCM) to discontinuous conduction mode (DCM) below ~250 mA load, reducing switching losses. Output discharge is handled by an internal 50 Ω MOSFET (VO-to-PGND), while pre-biased soft-start prevents sinking current during startup.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 2 A continuous-supports mid-power system rails without external current boosting. |
| Input Voltage Range | 4.5 V–18 V (VCC); 2 V–18 V (VIN)-enables wide-input industrial and adapter-fed applications. |
| Output Voltage Range | 0.76 V–5.5 V-programmable via resistor divider for core logic, memory, and I/O supply domains. |
| Switching Frequency | 700 kHz nominal-balances EMI, inductor size, and efficiency for compact PCB layouts. |
| FET RDS(on) | 160 mΩ (HS), 110 mΩ (LS)-minimizes conduction loss at 2 A, enabling >90% peak efficiency at 12 V→3.3 V. |
| Control Mode | D-CAP2™-eliminates need for external compensation components and supports ceramic output capacitors. |
| Light-Load Efficiency | <10 μA shutdown current; Eco-Mode™ reduces quiescent current to ~200 μA at 10 mA load. |
Pinout & Package
TPS54226PWP uses the 14-pin HTSSOP package with exposed PowerPAD™ thermal pad (PWP suffix), optimized for high-current thermal dissipation. The PowerPAD™ must be soldered to PGND for junction-to-board thermal resistance of 26.4°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VO | Output voltage node | Connects directly to output capacitor and feedback divider; used for on-time adjustment in D-CAP2™ loop. |
| VFB | Feedback input | Senses regulated output via resistor divider; reference threshold is 765 mV ±2 mV over temperature. |
| VREG5 | 5.5 V internal LDO output | Powers internal circuitry; requires 1 μF ceramic cap to GND; supplies VBST bootstrap via internal diode. |
| SS | Soft-start control | 2 μA current source charges external capacitor; sets ramp time (TSS = CSS × 0.765 / 2 μA). |
| GND | Signal ground reference | Reference for analog blocks; must be tied to PGND near device to minimize noise coupling. |
| PG | Open-drain power good | Asserts high after 1.7×TSS when VOUT is within ±10%; requires 20–150 kΩ pull-up to VREG5. |
| EN | Enable input | Active-high logic; thresholds are 1.5 V (high), 0.4 V (low); supports sequencing and standby control. |
| VCC | Control supply input | 4.5–18 V input for internal bias; powers gate drivers and logic; separate from main power path (VIN). |
| VIN | Main power input | 2–18 V input to high-side FET drain; requires local 10 μF ceramic decoupling and 0.1 μF bypass. |
| VBST | Bootstrap supply | Connected to SW via 0.1 μF ceramic cap; enables high-side gate drive above VIN using VREG5 diode. |
| SW1/SW2 | Switch nodes | Drain-source connections of HS/LS FETs; high dV/dt nodes requiring short, low-inductance routing. |
| PGND1/PGND2 | Power ground returns | Low-side FET sources and current sense inputs; must be connected solidly to PowerPAD™ and GND. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ adaptive on-time control | Enables stable operation with zero-ESR ceramic output capacitors and eliminates external compensation network. |
| Auto-Skip Eco-Mode™ | Reduces switching frequency under light load to maintain >85% efficiency at 10 mA output current. |
| Pre-biased soft-start | Prevents reverse current flow into pre-charged output by gradually enabling low-side FET gate drive. |
| Integrated 5.5 V LDO (VREG5) | Provides clean bias for internal logic and bootstrap circuit; sinks up to 70 mA and regulates ±20 mV line/load. |
| Comprehensive protection suite | Includes cycle-by-cycle OCP (3.1 A typ), output OVP/UVP (±15%), thermal shutdown (150°C), and UVLO (3.8 V). |
Applications
| Digital TV Power Supply | High Definition Blu-ray Disc™ Player |
|---|---|
Use Scenario: Primary 3.3 V and 1.2 V rails for SoC, memory, and HDMI interface in broadcast-grade digital TVs. IC Role / Device Role / Timing Role: Synchronous buck regulator delivering tightly regulated, low-noise DC power with fast transient response to dynamic video processing loads. Use Value: D-CAP2™ control maintains <1% output deviation during 1 A load steps; Eco-Mode™ extends standby battery life in smart TV sleep modes. |
Use Scenario: Dual-rail power for BD-ROM servo motor driver, laser diode controller, and MPEG decode SoC. IC Role / Device Role / Timing Role: Main DC/DC converter supplying 1.8 V core and 2.5 V I/O rails with precise soft-start sequencing to avoid latch-up. Use Value: Pre-biased soft-start prevents voltage droop on shared 3.3 V bus during disc spin-up; Power Good ensures firmware boot only after stable regulation. |
| Networking Home Terminal | Digital Set Top Box (STB) |
Use Scenario: Power conversion for DOCSIS 3.1 cable modems and fiber ONTs requiring multiple isolated low-voltage rails. IC Role / Device Role / Timing Role: Secondary buck stage stepping down 12 V intermediate bus to 1.05 V CPU core voltage with tight ripple control. Use Value: 700 kHz switching allows small 2.2 μH inductors; low 160 mΩ RDS(on) minimizes thermal rise in sealed enclosures. |
Use Scenario: Compact, cost-sensitive 1.2 V/3.3 V dual-output power solution for HD STB mainboard with IR receiver and tuner ICs. IC Role / Device Role / Timing Role: High-efficiency point-of-load regulator supporting burst-mode video decoding and deep-sleep states. Use Value: Eco-Mode™ achieves 89% efficiency at 50 mA load; 10 μA shutdown current meets Energy Star® 7.0 standby requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54227PWP | Same pinout, identical D-CAP2™ architecture, but rated for 2.5 A output and higher RDS(on) (140 mΩ HS / 90 mΩ LS). | Supports higher current headroom in same footprint; suitable where future-proofing or margin expansion is required. | Select TPS54227PWP if design requires >2 A peak load or tighter thermal margin under sustained 2 A operation. |
| MP2315DJ-LF-Z | Monolithic 2 A buck with 3.3 V–36 V input, fixed 500 kHz frequency, no Eco-Mode™, and lower quiescent current (25 μA). | Lacks D-CAP2™ transient performance and pre-biased soft-start; better suited for non-dynamic, wide-input industrial sensors. | Choose MP2315DJ-LF-Z only for ultra-wide VIN (up to 36 V) applications where fast transient response is secondary to input range. |
Compared with TPS54226PWP, TPS54227PWP offers higher current capability in identical HTSSOP-14 packaging, while MP2315DJ-LF-Z trades D-CAP2™ responsiveness for broader input voltage range and lower IQ-making each viable only where their specific strengths align with system-level constraints.
Availability
TPS54226PWP is available at Aetrix Electronics and suitable for digital TV power supplies, Blu-ray player subsystems, and networking home terminals requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS54226PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and automotive-grade reliability.
The TPS54226 belongs to TI's SWIFT™ synchronous buck converter family, designed specifically for cost-sensitive, space-constrained consumer electronics requiring fast transient response, low ESR capacitor compatibility, and robust protection features.
FAQ
What is the maximum recommended output current for TPS54226PWP under continuous operation?
The TPS54226PWP is rated for 2 A continuous output current across its full operating temperature range (–40°C to 85°C). This rating assumes proper PCB layout with the PowerPAD™ thermally connected to a ≥4 cm² copper pour and ≥6 thermal vias. At 2 A, junction temperature remains within safe limits (<125°C) with 12 V input and 3.3 V output under typical airflow conditions. Derating is required above 85°C ambient.
Does TPS54226PWP support ceramic output capacitors, and what is the minimum recommended value?
Yes, TPS54226PWP fully supports low-ESR ceramic output capacitors due to its D-CAP2™ control architecture. The datasheet recommends 22 μF to 68 μF total capacitance, using X5R or X7R dielectrics rated ≥6.3 V. For 1.05 V output, two parallel 22 μF/6.3 V capacitors (e.g., TDK C3216X5R0J226M) provide optimal ripple suppression and RMS current handling per the design guide.
How does the pre-biased soft-start function work in TPS54226PWP?
TPS54226PWP's pre-biased soft-start prevents reverse current flow when the output is already charged. When EN goes high, the controller monitors VFB versus internal soft-start voltage. If VFB exceeds the soft-start ramp, it initiates low-side FET gate pulses with narrow, incrementally increasing on-time until reaching normal duty cycle-avoiding sink current and ensuring monotonic VO ramp-up without overshoot or undershoot.
What is the purpose of the VREG5 pin on TPS54226PWP, and how should it be decoupled?
VREG5 is a 5.5 V internal LDO output that powers the control logic and supplies the VBST bootstrap circuit via an internal diode. It must be decoupled with a 1.0 μF X5R/X7R ceramic capacitor placed ≤2 mm from the pin to GND. This capacitor stabilizes VREG5 under dynamic load and ensures reliable high-side gate drive; omitting it causes erratic switching or startup failure.
Can TPS54226PWP operate with input voltage below 4.5 V, and what are the limitations?
Yes-TPS54226PWP supports VIN as low as 2 V, independent of its 4.5 V–18 V VCC range. However, operation below 4.5 V VIN reduces available output voltage headroom and may limit maximum duty cycle. For example, at VIN = 3.3 V, the highest achievable VOUT is ~2.5 V (75% duty cycle limit). Also, VCC must remain ≥4.5 V to power internal regulators; a separate bias supply is required if VIN < 4.5 V.
TPS54226PWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™, D-CAP2™, Eco-Mode™
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 2A
- Frequency - Switching:
- 700kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
TPS54226PWP FAQ
1.How can I place an order for TPS54226PWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54226PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54226PWP reliable?
The price and inventory of TPS54226PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54226PWP is usually 5 days.
3.What payment methods are accepted for TPS54226PWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54226PWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54226PWP?
TPS54226PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54226PWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54226PWP?
For technical support, including TPS54226PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54226PWP requirements.
6.How does Aetrix verify that TPS54226PWP is sourced from the original manufacturer or authorized distributors?
All TPS54226PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54226PWP meets industry standards.
7.What is the process for return or replacement of TPS54226PWP?
All TPS54226PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS54226PWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54226PWP part is unused and in its original packaging.
Return procedure for TPS54226PWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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