Texas Instruments TPS54283PWPR
- Part No.:
- TPS54283PWPR
- Manufacturer:
- Texas Instruments
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54283PWPR.pdf
- Description:
- IC REG BUCK ADJ 2A DL 14HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS54283PWPR from Texas Instruments is a dual non-synchronous buck converter IC with two integrated 100-mΩ high-side N-channel MOSFETs, supporting independent or sequenced 2-A outputs across a 4.5-V to 28-V input range. It delivers regulated output voltages from 0.8 V to 90% of VIN with fixed 300-kHz switching frequency, internal 0.8-V ±1.5% reference, and 2.1-ms soft start-used in digital TV power rails and DSP core supply.
For engineers reviewing the TPS54283PWPR datasheet, TPS54283PWPR pinout, TPS54283PWPR application, or TPS54283PWPR equivalent, key selection considerations include dual-channel current-mode control, 180° out-of-phase PWM operation, ratiometric/sequential startup via SEQ pin, and ILIM2-selectable overcurrent thresholds for asymmetric load optimization.
Technical Context
This device implements current-mode control with internal slope compensation and fully integrated loop compensation-eliminating external compensation components. Each channel features dedicated error amplifiers, pulse-by-pulse overcurrent protection, and thermal shutdown at 148°C.
The 14-pin HTSSOP PowerPAD™ package integrates dual high-side MOSFETs (RDS(on) = 100 mΩ typ), BP-regulated bootstrap supplies for gate drive, and independent EN1/EN2 enable inputs supporting independent, ratiometric, or sequential startup modes configured by the SEQ pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input voltage range | 4.5 V to 28 V - supports wide industrial and consumer DC bus inputs including 5 V, 12 V, and 24 V systems. |
| Switching frequency | 300 kHz - fixed frequency enables predictable EMI filtering and inductor sizing; lower than TPS54286's 600 kHz for reduced switching loss. |
| Output current per channel | Up to 2 A - sustained continuous output capability per channel with thermal derating above +85°C ambient. |
| Feedback reference voltage | 0.8 V ±1.5% - precision trimmed bandgap reference enabling accurate output regulation down to 0.8 V. |
| Soft start time | 2.1 ms - internally timed ramp prevents inrush current; minimum 50-µF output capacitance recommended to avoid disturbance. |
| Overcurrent protection | Channel 1 fixed at 3.0 A; Channel 2 selectable (1.5 A or 3.0 A) via ILIM2 pin - allows asymmetrical load design without oversized magnetics on low-current rail. |
| Thermal shutdown | 148°C with 20°C hysteresis - protects against sustained overload or poor PCB thermal design; automatic recovery after cooldown. |
Pinout & Package
TPS54283PWPR is housed in a 14-pin PowerPAD™ HTSSOP (PWP) package with exposed thermal pad on bottom side, requiring direct connection to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVDD1 (Pin 1) | Power input for Output 1 high-side MOSFET | Must be bypassed with ≥10-µF low-ESR ceramic capacitor; independent of PVDD2, enabling dual-supply operation. |
| BOOT1 (Pin 2) | Bootstrap supply for Output 1 high-side gate driver | Connects via 22–82-nF capacitor to SW1; internal switch charges it from BP during OFF time; optional series resistor slows turn-on. |
| SW1 (Pin 3) | Switching node for Output 1 | Drives external inductor; snubber recommended to suppress ringing; connects directly to bootstrap capacitor negative terminal. |
| GND (Pin 4) | Signal and power ground reference | Must connect to thermal pad; serves as return path for all analog and power circuits; critical for noise immunity and thermal performance. |
| SEQ (Pin 10) | Startup sequencing mode selector | Configures ratiometric (floating), sequential CH2→CH1 (tied to BP), or sequential CH1→CH2 (tied to GND); internal 150-kΩ divider to BP/GND. |
| ILIM2 (Pin 9) | Channel 2 overcurrent threshold select | Three states: GND = 1.5 A, floating = 3.0 A, BP = 1.5 A - enables optimized component scaling for mismatched loads. |
| FB1 / FB2 (Pins 7, 8) | Voltage feedback inputs | Each regulates its output to 0.8 V reference via external resistor divider; internal transconductance amplifier and compensation eliminate external network. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 100-mΩ high-side MOSFETs | Reduces external component count and board space; eliminates need for discrete high-side switches and associated gate drivers. |
| 180° out-of-phase PWM outputs | Halves input ripple current compared to in-phase operation-reducing required input capacitance and improving EMI profile. |
| Internal compensation & slope correction | Enables stable operation with standard L-C filter designs without tuning external compensation networks or adding slope compensation circuitry. |
| Programmable startup sequencing | Single-pin SEQ configuration supports ratiometric, master-slave CH1→CH2, or CH2→CH1 sequencing-critical for FPGA, ASIC, and multi-rail SoC power-up compliance. |
| Independent enable inputs (EN1/EN2) | Allows dynamic power gating of individual rails; internal 6-µA pull-up enables "always-on" operation when left floating or tied to PVDD2. |
Applications
| Digital TV Power Supply | FPGA Core & I/O Rail Sequencing |
|---|---|
Use Scenario: Providing separate 1.2-V core and 3.3-V I/O rails for broadcast-grade digital TV SoCs with strict power-up timing requirements. IC Role / Device Role / Timing Role: Dual-output buck controller managing independent soft-start ramps and ratiometric regulation to meet JEDEC JESD84-A44B sequencing specs. Use Value: SEQ pin configures precise 400-µs delay between rails; internal 0.8-V reference ensures <±2% output accuracy across temperature for video processing stability. |
Use Scenario: Powering Xilinx Spartan-6 FPGA with 1.2-V core and 2.5-V auxiliary rails where incorrect sequencing risks configuration latch-up. IC Role / Device Role / Timing Role: Dual-channel regulator enforcing CH1→CH2 sequential startup via SEQ=GND, with EN2 held low until CH1 reaches regulation. Use Value: Eliminates need for external sequencing ICs; ILIM2 pin allows 1.5-A limit on I/O rail while maintaining 3-A headroom on core rail-optimizing BOM cost and thermal margin. |
| Set-Top Box DC-DC Conversion | DSP Audio Processing Board |
Use Scenario: Generating 1.8-V processor and 5-V peripheral rails from a 12-V wall adapter in compact STB enclosures with limited airflow. IC Role / Device Role / Timing Role: Integrated dual converter delivering 2-A each with shared thermal management via PowerPAD™ HTSSOP package. Use Value: 300-kHz switching balances efficiency and size; thermal shutdown at 148°C prevents field failures under sustained 65°C ambient conditions. |
Use Scenario: Supplying 3.3-V analog front-end and 1.8-V digital core for TI C674x DSP in real-time audio analyzers requiring low-noise, fast-transient response. IC Role / Device Role / Timing Role: Current-mode controller with 2.1-ms soft start and pulse-by-pulse OCP ensuring clean power-up without brownout-induced audio artifacts. Use Value: Internal compensation stabilizes loop with standard 2.2-µH inductors and 220-µF output caps-reducing design cycle time versus externally compensated alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54286PWPR | 600-kHz switching frequency vs. TPS54283PWPR's 300 kHz; identical pinout, package, and feature set. | Better suited for space-constrained designs needing smaller magnetics; higher switching loss reduces full-load efficiency by ~1.2% at 12-V input. | Select TPS54286PWPR only when board area is critical and thermal headroom permits higher fSW-related losses. |
| LM26420XSDE/NOPB | 2.2-MHz fixed frequency, integrated 30-mΩ MOSFETs, no SEQ or ILIM2 programmability; requires external compensation. | Targeted at high-density portable applications; lacks startup sequencing and asymmetric OCP-unsuitable for FPGA/ASIC sequencing or mismatched loads. | Choose LM26420XSDE/NOPB for ultra-compact 1-A dual-rail apps where sequencing isn't required and layout space is premium. |
Compared with TPS54286PWPR, TPS54283PWPR trades higher-frequency EMI for improved thermal performance and lower gate-drive losses; versus LM26420XSDE/NOPB, it provides superior system-level flexibility via SEQ and ILIM2 pins but requires larger passive components.
Availability
TPS54283PWPR is available at Aetrix Electronics and suitable for digital TV, set-top box, and DSP audio processing applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS54283PWPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion ICs.
TPS54283PWPR belongs to TI's SWIFT™ family of integrated DC-DC converters, designed specifically for cost-sensitive, space-constrained consumer and industrial applications demanding dual-rail flexibility and robust protection features.
FAQ
What is the maximum input voltage rating for the TPS54283PWPR?
The TPS54283PWPR has an absolute maximum input voltage rating of 30 V on PVDD1 and PVDD2 pins. Its recommended operating input range is 4.5 V to 28 V. Exceeding 30 V-even transiently-may cause permanent damage. The device includes undervoltage lockout (UVLO) that disables operation below 3.8 V and enables above 4.1 V, with 400-mV hysteresis to prevent chatter near threshold.
How does the SEQ pin affect startup behavior in the TPS54283PWPR?
The SEQ pin on the TPS54283PWPR determines startup sequencing mode: floating enables ratiometric startup, tying to GND configures sequential CH1→CH2, and tying to BP configures sequential CH2→CH1 with ~400-µs delay. In sequential mode, the slave output begins soft start only after the master output reaches regulation. This behavior is confirmed in the Electrical Characteristics table and Figure 17–19 of the SLUS749C datasheet.
Can the TPS54283PWPR operate with different input voltages on PVDD1 and PVDD2?
Yes, the TPS54283PWPR supports dual-supply operation: PVDD1 powers only the Output 1 high-side MOSFET, while PVDD2 powers the control circuitry, EN1/EN2 pull-ups, and Output 2 high-side MOSFET. The datasheet explicitly states "The voltage on PVDD1 may be higher or lower than PVDD2," enabling flexible system-level power architecture-e.g., using a local 5-V rail for Output 1 and main 12-V bus for Output 2 and logic.
What is the purpose of the ILIM2 pin on the TPS54283PWPR?
The ILIM2 pin on the TPS54283PWPR selects the overcurrent protection threshold for Output 2: grounded = 1.5 A, floating = 3.0 A, tied to BP = 1.5 A. This allows designers to scale external inductors and capacitors for asymmetric loads-e.g., setting Output 1 to 3-A full capability for CPU core while limiting Output 2 to 1.5 A for lower-power peripherals-without compromising fault protection integrity.
Does the TPS54283PWPR require external compensation components?
No, the TPS54283PWPR features fully internal compensation, including transconductance error amplifiers and loop compensation networks. The datasheet states "Internal Compensation (See Page 16)" and confirms in the Functional Description that "each PWM channel contains an internally-compensated error amplifier." This eliminates external RC networks, simplifying layout and reducing BOM count-though L-C filter selection must still follow TI's stability guidelines in Section 10.
TPS54283PWPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 28V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 25.2V
- Current - Output:
- 2A
- Frequency - Switching:
- 310kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
TPS54283PWPR FAQ
1.How can I place an order for TPS54283PWPR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54283PWPR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54283PWPR reliable?
The price and inventory of TPS54283PWPR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54283PWPR is usually 5 days.
3.What payment methods are accepted for TPS54283PWPR?
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TPS54283PWPR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54283PWPR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54283PWPR?
For technical support, including TPS54283PWPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54283PWPR requirements.
6.How does Aetrix verify that TPS54283PWPR is sourced from the original manufacturer or authorized distributors?
All TPS54283PWPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54283PWPR meets industry standards.
7.What is the process for return or replacement of TPS54283PWPR?
All TPS54283PWPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS54283PWPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54283PWPR part is unused and in its original packaging.
Return procedure for TPS54283PWPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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