Texas Instruments TPS54291PWPR
- Part No.:
- TPS54291PWPR
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54291PWPR.pdf
- Description:
- IC REG BUCK ADJ DL 16HTSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,016
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS54291PWPR from Texas Instruments is a dual-output, fully synchronous buck converter IC integrating two independent PWM channels with 1.5-A (CH1) and 2.5-A (CH2) continuous output capability, operating from 4.5 V to 18 V input, delivering regulated outputs down to 0.8 V with 1% reference accuracy, and switching at 600 kHz for optimized efficiency and EMI in space-constrained power rails.
For engineers reviewing the TPS54291PWPR datasheet, TPS54291PWPR pinout, TPS54291PWPR application, or TPS54291PWPR equivalent, this device is selected for dual-rail DC/DC conversion where phase interleaving, external compensation flexibility, dedicated enable control per channel, and integrated MOSFETs eliminate discrete FETs and simplify layout in consumer and embedded power systems.
Technical Context
The TPS54291PWPR implements current-mode control with dual transconductance error amplifiers (325 µS typical), 180° out-of-phase PWM operation to reduce input ripple, and internal slope compensation enabling stable loop response with external R-C compensation on COMP1/COMP2 pins. Its BP-regulated 5.2-V bootstrap supply powers high-side gate drivers with integrated anti-cross-conduction logic.
Each channel features independent enable (EN1/EN2), feedback (FB1/FB2), and compensation (COMP1/COMP2) interfaces, while sharing PVDD2-supplied control circuitry, UVLO monitoring (4.1 V turn-on), thermal shutdown (145°C), and pulse-by-pulse overcurrent protection (2.2 A CH1 / 3.8 A CH2).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports wide-input industrial and consumer supplies without pre-regulation. |
| Switching Frequency | 600 kHz - balances efficiency, inductor size, and EMI filtering requirements for compact designs. |
| Output Current Capability | CH1: 1.5 A, CH2: 2.5 A - enables independent powering of core/logic and I/O rails in SoC-based systems. |
| Reference Voltage Accuracy | 0.8 V ±1% (0°C to 85°C) - ensures tight output regulation across temperature without trimming. |
| Overcurrent Limit | CH1: 2.2 A, CH2: 3.8 A - provides robust short-circuit protection with pulse-skipping recovery. |
| Soft-Start Time | 2.6 ms - controls inrush current during power-up to prevent input rail collapse or capacitor stress. |
| Thermal Shutdown Threshold | 145°C with 20°C hysteresis - protects against sustained overload or poor heatsinking in enclosed environments. |
Pinout & Package
TPS54291PWPR is housed in a 16-pin HTSSOP (PWP) package with 5.00 mm × 4.40 mm body size and exposed thermal pad for enhanced thermal performance. The PowerPAD™ design requires soldering the thermal pad to a PCB ground plane for optimal junction-to-board thermal resistance (22.3°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVDD1 | Power input for CH1 high-side MOSFET | Must be bypassed locally to PGND1 with ≥10 µF ceramic capacitor; separate from PVDD2 to isolate switching noise. |
| BOOT1 | High-side gate driver supply for CH1 | Connects via 22–68 nF capacitor to SW1; internal switch charges it from BP during off-time. |
| SW1 | Switch-node output for CH1 | Drives external inductor; connects directly to BOOT1 capacitor and low-side FET source. |
| PGND1 | Power ground return for CH1 | Isolated from analog GND to prevent switching noise coupling into feedback and control circuits. |
| EN1 | Active-low enable for CH1 | Pulled up internally to PVDD2; <0.9 V enables soft-start, >1.5 V disables CH1. |
| FB1 | Voltage feedback input for CH1 | Regulates output by comparing resistor-divider voltage to internal 0.8-V reference. |
| COMP1 | Error amplifier output for CH1 | Accepts external R-C network to set loop gain and phase margin for stability. |
| BP | Bootstrap regulator output | 5.2-V regulated supply for both BOOT1/BOOT2; bypass with 4.7–10 µF ceramic to GND. |
| GND | Analog ground reference | Common reference for FB, COMP, and internal circuitry; must be star-connected to minimize noise. |
| FB2 | Voltage feedback input for CH2 | Independent regulation path identical to FB1; supports different output voltages per channel. |
| EN2 | Active-low enable for CH2 | Functionally identical to EN1 but electrically isolated; allows staggered or independent channel startup. |
| COMP2 | Error amplifier output for CH2 | Enables independent loop compensation tuning for CH2, critical when output loads differ significantly. |
| PVDD2 | Main power input for control circuitry and CH2 high-side FET | Monitored for UVLO (4.1 V); powers EN1/EN2 pullups and BP regulator. |
| BOOT2 | High-side gate driver supply for CH2 | Identical function to BOOT1 but for CH2; requires dedicated 22–68 nF capacitor to SW2. |
| SW2 | Switch-node output for CH2 | Phase-interleaved with SW1 (180° offset) to halve effective input ripple current. |
| PGND2 | Power ground return for CH2 | Separate from PGND1 and GND to maintain noise isolation between channels. |
Key Features
| Feature | Design Value |
|---|---|
| Dual fully synchronous buck topology | Integrated high- and low-side MOSFETs (CH1: 265 mΩ HS / 190 mΩ LS; CH2: 190 mΩ HS / 150 mΩ LS) eliminate external switches and reduce BOM count. |
| 180° out-of-phase PWM operation | Reduces RMS input capacitor ripple current by ~70%, allowing smaller input capacitance and lower EMI filter cost. |
| External compensation on both channels | Independent COMP1/COMP2 pins support tailored loop response for mismatched output loads or PCB layouts. |
| Dedicated enable per channel | EN1/EN2 allow sequenced power-up (e.g., core before I/O) or fault-isolated shutdown without affecting other rail. |
| Integrated bootstrap switch and BP regulator | Eliminates external bootstrap diode and reduces component count; BP delivers regulated 5.2 V with 25 mA short-current capability. |
Applications
| Set-Top Box Power Management | Digital TV Core/I/O Rails |
|---|---|
|
Use Scenario: Dual-rail power delivery for SoC (1.2 V core) and HDMI interface (3.3 V I/O) in compact set-top box enclosures. IC Role / Device Role / Timing Role: Primary DC/DC controller managing independent voltage domains with precise sequencing and ripple suppression. Use Value: 600 kHz switching enables small 2.2 µH inductors; 180° interleaving cuts input capacitance requirement by 50% versus single-channel solutions. |
Use Scenario: Simultaneous generation of processor core (1.0 V) and memory interface (1.8 V) rails in slim-profile LCD TVs. IC Role / Device Role / Timing Role: Dual synchronous buck converter providing regulated, low-noise supplies with independent enable control for power-state transitions. Use Value: Integrated MOSFETs and 1% reference ensure ±1.5% output accuracy across line/load/temperature, meeting DDR memory voltage tolerance. |
| DSP Board Power Supply | Consumer Audio Amplifier Bias |
|
Use Scenario: Powering TI C6000 DSP with 1.2 V core and 3.3 V peripheral supply on a single-layer PCB with limited thermal mass. IC Role / Device Role / Timing Role: High-efficiency dual converter delivering tightly regulated rails with thermal shutdown protecting against board-level overheating. Use Value: 145°C thermal shutdown with 20°C hysteresis prevents cumulative thermal damage during sustained compute loads. |
Use Scenario: Generating split ±15 V bias rails for Class AB audio amplifiers in smart speakers using shared input bus. IC Role / Device Role / Timing Role: Dual buck controller configured in inverting topology (with external charge pump) to generate negative rail from positive input. Use Value: Independent FB/COMP pins allow fine-tuning of each rail's transient response to handle dynamic audio load steps without cross-talk. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54290PWPR | 300 kHz switching frequency; 5.2 ms soft-start; 90% max duty cycle | Better light-load efficiency and lower EMI in noise-sensitive audio/video systems | Select when lower switching loss and relaxed EMI filtering outweigh size constraints. |
| TPS54292PWPR | 1.2 MHz switching frequency; 1.3 ms soft-start; 78% max duty cycle | Enables ultra-compact designs with sub-1 µH inductors and reduced output capacitance | Select when board area is critical and input voltage supports higher frequency duty-cycle limits. |
Compared with TPS54291PWPR, the TPS54290PWPR trades higher efficiency at light loads for larger magnetics, while the TPS54292PWPR achieves miniaturization at the cost of reduced maximum duty cycle and tighter input voltage headroom requirements.
Availability
TPS54291PWPR is available at Aetrix Electronics and suitable for set-top boxes, digital TVs, and DSP power management requiring stable component supply, long-term lifecycle support, and traceable sourcing for production ramp.
Supply support for TPS54291PWPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design and manufacturing.
The TPS5429x family was engineered for high-density, dual-rail DC/DC conversion in consumer electronics and embedded systems where integration, thermal performance, and design simplicity are critical.
FAQ
What is the recommended input capacitor configuration for TPS54291PWPR?
Use a minimum 10 µF low-ESR ceramic capacitor at each PVDD pin (PVDD1 and PVDD2), placed as close as possible to the respective pin and its associated PGND. For optimal input ripple reduction, add a bulk electrolytic (22–47 µF) upstream and leverage 180° phase interleaving to halve RMS input current-enabling smaller total capacitance than single-channel equivalents.
How does the TPS54291PWPR handle overcurrent events on each channel?
The TPS54291PWPR implements pulse-by-pulse overcurrent protection independently per channel: CH1 triggers at 2.2 A, CH2 at 3.8 A. Upon detection, six consecutive PWM pulses are skipped to allow inductor current decay. If fault persists, the device enters hiccup mode with 16-ms timeout (TPS54291), cycling until fault clears-preventing thermal runaway without latching off.
Can TPS54291PWPR operate with only one channel enabled?
Yes. TPS54291PWPR supports single-channel operation: tie EN1 to GND to enable CH1 while leaving EN2 floating (internally pulled to PVDD2) or pulled high (>1.5 V) to disable CH2. The disabled channel draws negligible current, and the active channel operates normally with full 1.5-A capability, 600-kHz switching, and independent compensation.
What is the role of the BP pin in TPS54291PWPR, and how should it be decoupled?
The BP pin delivers a regulated 5.2-V supply for charging both BOOT1 and BOOT2 capacitors. It must be bypassed to GND with a 4.7–10 µF X7R ceramic capacitor (10 µF preferred) placed adjacent to the pin. Insufficient BP capacitance causes bootstrap under-voltage, leading to high-side FET dropout and erratic regulation-especially under heavy load or fast transients.
Does TPS54291PWPR require external components for soft-start, and how is it controlled?
No external components are required for soft-start: TPS54291PWPR integrates fixed 2.6-ms soft-start timing per channel, initiated automatically when EN1 or EN2 falls below 0.9 V. The internal ramp charges FBx from 0 V to 0.8 V, gradually increasing duty cycle. To delay startup, add an RC network to ENx-51 kΩ + 100 nF yields ~5.2 ms additional delay before soft-start begins.
TPS54291PWPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 16.2V
- Current - Output:
- 1.5A, 2.5A
- Frequency - Switching:
- 600kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
TPS54291PWPR FAQ
1.How can I place an order for TPS54291PWPR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54291PWPR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54291PWPR reliable?
The price and inventory of TPS54291PWPR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54291PWPR is usually 5 days.
3.What payment methods are accepted for TPS54291PWPR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54291PWPR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54291PWPR?
TPS54291PWPR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54291PWPR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54291PWPR?
For technical support, including TPS54291PWPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54291PWPR requirements.
6.How does Aetrix verify that TPS54291PWPR is sourced from the original manufacturer or authorized distributors?
All TPS54291PWPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54291PWPR meets industry standards.
7.What is the process for return or replacement of TPS54291PWPR?
All TPS54291PWPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS54291PWPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54291PWPR part is unused and in its original packaging.
Return procedure for TPS54291PWPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS54291PWPR Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

