Texas Instruments TPS54294RSAR
- Part No.:
- TPS54294RSAR
- Manufacturer:
- Texas Instruments
- Package:
- 16-VQFN Exposed Pad
- Datasheet:
-
TPS54294RSAR.pdf
- Description:
- IC REG BUCK ADJ 2A DL 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,871
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS54294RSAR from Texas Instruments is a dual-channel 2A synchronous step-down DC/DC converter with integrated high-side (150 mΩ) and low-side (100 mΩ) N-channel MOSFETs, D-CAP2™ control mode, 700 kHz pseudo-fixed switching frequency, and independent 0.76 V–7.0 V output voltage programming per channel - used in point-of-load regulation for digital TV, STB, and gaming console power supplies.
For engineers reviewing the TPS54294RSAR datasheet, TPS54294RSAR pinout, TPS54294RSAR application, or TPS54294RSAR equivalent, key selection considerations include dual-channel adaptive on-time control, non-sinking pre-biased soft start, loss-less current sensing, and thermal shutdown at 155°C with 25°C hysteresis - all in a 4 mm × 4 mm 16-pin VQFN (RSA) package with exposed PowerPAD.
Technical Context
The TPS54294RSAR implements D-CAP2™ adaptive on-time control, combining constant on-time operation with internal ramp compensation to enable stable regulation with ceramic or ultra-low-ESR output capacitors without external loop compensation. Each channel operates independently with dedicated EN, PG, VFB, and SW pins.
It supports seamless transition between PWM mode (heavy load) and Auto-Skip Eco-mode™ (light load), delivering >90% efficiency at 1 A with 12 V input and 3.3 V/1.5 V outputs. Protection includes cycle-by-cycle over-current, OVP/UVP (±16% window), UVLO on VREG5, and thermal shutdown with hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports wide industrial and consumer DC bus inputs including 5 V, 12 V, and 15 V rails. |
| Output Current per Channel | 2 A continuous - enables dual-rail point-of-load conversion for SoC core and I/O domains. |
| Switching Frequency | 700 kHz (pseudo-fixed) - balances EMI, inductor size, and efficiency; set by VIN and VO via adaptive on-time timer. |
| Feedback Reference Voltage | 765 mV ±7 mV - sets output via resistor divider; temperature coefficient ±115 ppm/°C ensures stability across –40°C to 85°C. |
| High-Side rDS(on) | 150 mΩ - minimizes conduction loss at high duty cycles; thermally compensated for consistent current limit. |
| Soft-Start Time | 1.0 ms - prevents inrush current; includes non-sinking pre-biased startup to avoid output voltage droop. |
| Thermal Shutdown | 155°C threshold with 25°C hysteresis - protects against sustained overload or poor PCB thermal design. |
Pinout & Package
TPS54294RSAR uses a 4 mm × 4 mm, 16-pin VQFN (RSA) package with exposed thermal pad (PowerPAD™) soldered to GND for enhanced thermal performance (θJA = 34.9°C/W). Pin numbering follows TI standard top-view orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1, VIN2 (Pins 3, 2) | Power input supply | Connects to high-side FET drains; accepts 4.5–18 V; separate inputs allow independent rail sourcing. |
| VBST1, VBST2 (Pins 4, 1) | Bootstrap supply | Drives high-side gate; requires 0.1 µF ceramic capacitor to SWx; internally diode-clamped to VREG5. |
| SW1, SW2 (Pins 5, 16) | Switch node | Drain-source connection of both FETs; carries high dv/dt; routing must minimize parasitic inductance. |
| PGND1, PGND2 (Pins 6, 15) | Power ground return | Low-side FET source return; connects to current sense path; must be routed separately from SGND. |
| EN1, EN2 (Pins 7, 14) | Enable control | Active-high logic; 2.0 V H-threshold, 0.4 V L-threshold; internal 450 kΩ pull-down enables default disable. |
| PG1, PG2 (Pins 8, 13) | Power-good indicator | Open-drain output; asserts high after 1.5 ms when VOx is within ±16% of target; 75 Ω typical pull-down resistance. |
| VFB1, VFB2 (Pins 9, 12) | Feedback input | Resistor-divider input for output voltage setting; 0.35 µA max input bias current affects high-value divider accuracy. |
| GND (Pin 10) | Signal ground | Analog reference for VFB, SS, and internal comparators; must tie to PGND at single-point star ground. |
| VREG5 (Pin 11) | 5.5 V linear regulator output | Supplies internal circuitry and VBSTx bootstrap; requires ≥1.0 µF ceramic bypass to GND; active only when VIN1 > 3.83 V. |
| Exposed Pad | Thermal & electrical ground | Must be soldered to PCB GND plane with ≥4 thermal vias; primary path for heat dissipation and noise reduction. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ Control Mode | Enables fast transient response (<10 µs) and eliminates need for external compensation components - simplifies layout and reduces BOM count. |
| Loss-Less Low-Side Current Sensing | Uses rDS(on) of low-side FET for OCP; avoids sense resistor power loss and board area - improves efficiency and thermal margin. |
| Non-Sinking Pre-Biased Soft Start | Prevents reverse current flow during startup into pre-charged outputs - critical for hot-swap and multi-rail sequencing applications. |
| Auto-Skip Eco-mode™ | Reduces light-load quiescent current to <2.5 mA total (IIN), maintaining >85% efficiency at 10 mA output - extends battery life in standby modes. |
| Integrated 5.5 V Linear Regulator | Provides clean, regulated supply for internal logic and bootstrap circuits - eliminates need for external LDO and reduces system component count. |
Applications
| Digital TV Power Supply | Networking Home Terminal |
|---|---|
Use Scenario: Dual-rail power for main SoC (1.2 V core) and HDMI interface (3.3 V I/O) in 4K UHD television platforms. IC Role / Device Role / Timing Role: Primary point-of-load regulator delivering tightly regulated, low-noise 1.2 V and 3.3 V from 12 V DC bus. Use Value: D-CAP2™ control ensures <15 mV output deviation during 2 A load transients; Eco-mode™ maintains >87% efficiency at standby currents below 50 mA. | Use Scenario: Compact dual-output supply for cable modem/router SoC requiring 1.5 V CPU core and 1.8 V DDR memory rails. IC Role / Device Role / Timing Role: Synchronous buck controller managing independent enable and power-good signaling per rail. Use Value: Independent EN/PG pins allow staggered startup and fault isolation; 700 kHz switching enables use of 1.5 µH inductors under 3 mm height. |
| Digital Set Top Box (STB) | Gaming Console Core Supply |
Use Scenario: Power management for hybrid broadcast receiver with ARM processor (1.1 V), GPU (1.2 V), and USB PHY (3.3 V). IC Role / Device Role / Timing Role: Dual-channel DC/DC converter providing two independent regulated outputs with coordinated soft-start. Use Value: Non-sinking pre-biased soft start prevents voltage collapse on shared 3.3 V bus during cold boot; thermal shutdown protects against enclosure overheating. | Use Scenario: Core voltage regulation for FPGA-based game engine requiring 1.0 V @ 2 A and 1.8 V @ 2 A with tight transient tolerance. IC Role / Device Role / Timing Role: High-efficiency synchronous buck regulator with integrated FETs and loss-less current sensing. Use Value: 150 mΩ/100 mΩ FETs reduce conduction loss by 35% vs discrete solutions; 1.0 ms soft-start meets PCIe reset timing requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54295RSAR | Same pinout and package; higher current rating (3 A per channel); 180 mΩ/120 mΩ FETs; identical D-CAP2™ control. | Supports higher load currents but increases conduction loss at light loads; requires larger output inductors. | Select when >2 A per channel is required and board space allows larger magnetics. |
| MP2494DS-LF-Z | 2 A dual buck; fixed 500 kHz frequency; external compensation required; no VREG5 LDO or pre-biased soft start. | Lacks integrated LDO and advanced soft-start features; lower integration increases BOM and layout complexity. | Select for cost-sensitive designs where simplified control and reduced feature set are acceptable. |
Compared with TPS54294RSAR, TPS54295RSAR offers higher current headroom at the expense of light-load efficiency, while MP2494DS-LF-Z trades integration and advanced features for lower unit cost and simpler loop tuning.
Availability
TPS54294RSAR is available at Aetrix Electronics and suitable for digital TV, STB, and networking terminal applications requiring stable component supply, dual-rail flexibility, and automotive-grade thermal reliability.
Supply support for TPS54294RSAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion.
The TPS54294RSAR belongs to TI's SWIFT™ family of integrated power converters, designed specifically for compact, high-performance point-of-load regulation in consumer and industrial systems with stringent efficiency and transient response requirements.
FAQ
What is the maximum input voltage rating for the TPS54294RSAR?
The TPS54294RSAR has an absolute maximum input voltage rating of 20 V on VIN1 and VIN2 pins. However, the recommended operating range is 4.5 V to 18 V. Exceeding 18 V may trigger UVLO or cause reliability degradation over time. The device includes internal protection against transient overshoot up to 22 V for 10 ns.
Does the TPS54294RSAR support independent enable and power-good signaling per channel?
Yes, the TPS54294RSAR provides fully independent EN1/EN2 and PG1/PG2 pins. Each channel can be enabled or disabled separately, and each PG output asserts high only when its respective output voltage is within ±16% of the programmed value - enabling flexible power sequencing and fault isolation in multi-rail systems.
How does the D-CAP2™ control mode improve transient response in the TPS54294RSAR?
The TPS54294RSAR's D-CAP2™ control uses adaptive on-time modulation with internal ripple injection to achieve sub-10 µs load transient recovery without external compensation. It senses output voltage directly at VFB and adjusts switching on-time in real time, eliminating phase-margin constraints of traditional voltage-mode control - resulting in stable operation with ceramic capacitors down to 22 µF.
Can the TPS54294RSAR operate with pre-biased outputs during startup?
Yes, the TPS54294RSAR implements non-sinking pre-biased soft start. When the output is already charged, the controller gradually ramps up low-side FET conduction instead of forcing reverse current, preventing output voltage collapse. This behavior is confirmed in Figure 11 of the datasheet and applies to both channels independently.
What thermal management requirements apply to the TPS54294RSAR's exposed PowerPAD?
The TPS54294RSAR's exposed thermal pad must be soldered to a solid GND copper plane with ≥4 thermal vias (0.3 mm diameter minimum) to achieve the specified θJA of 34.9°C/W. Failure to connect the pad results in junction temperature rise exceeding 150°C at full load - triggering thermal shutdown. TI recommends using solder mask defined pads and verifying void-free reflow.
TPS54294RSAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™, Eco-Mode™
- Package/Case:
- 16-VQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 7V
- Current - Output:
- 2A
- Frequency - Switching:
- 700kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (4x4)
TPS54294RSAR FAQ
1.How can I place an order for TPS54294RSAR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54294RSAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54294RSAR reliable?
The price and inventory of TPS54294RSAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54294RSAR is usually 5 days.
3.What payment methods are accepted for TPS54294RSAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54294RSAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54294RSAR?
TPS54294RSAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54294RSAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54294RSAR?
For technical support, including TPS54294RSAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54294RSAR requirements.
6.How does Aetrix verify that TPS54294RSAR is sourced from the original manufacturer or authorized distributors?
All TPS54294RSAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54294RSAR meets industry standards.
7.What is the process for return or replacement of TPS54294RSAR?
All TPS54294RSAR units undergo pre-shipment inspection (PSI). If there is an issue with TPS54294RSAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54294RSAR part is unused and in its original packaging.
Return procedure for TPS54294RSAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS54294RSAR Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

