Texas Instruments TPS54313PWPR
- Part No.:
- TPS54313PWPR
- Manufacturer:
- Texas Instruments
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54313PWPR.pdf
- Description:
- IC REG BUCK 1.5V 3A 20HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS54313PWPR from Texas Instruments is a 3-A synchronous buck PWM converter with integrated 60-mΩ high- and low-side MOSFETs, fixed 1.5-V output voltage, 1.0% initial accuracy, and operation over 3–6-V input range. It delivers point-of-load regulation for FPGA core supplies in telecom infrastructure equipment with fast transient response and internal compensation.
For engineers reviewing the TPS54313PWPR datasheet, TPS54313PWPR pinout, TPS54313PWPR application, or TPS54313PWPR equivalent, key selection factors include its HTSSOP-20 PowerPAD™ package thermal performance, adjustable 280–700-kHz switching frequency via RT resistor, internal slow-start time of 5.6 ms, and powergood signaling for supply sequencing in multi-rail systems.
Technical Context
The TPS54313PWPR implements a voltage-mode synchronous buck topology with an integrated high-performance error amplifier (26 dB open-loop gain, 3–5 MHz unity-gain bandwidth) and adaptive dead-time control to prevent shoot-through. Its PWM comparator features 70–85 ns propagation delay and 100 ns leading-edge blanking for robust current-limit response.
It uses a precision 0.891-V bandgap reference trimmed during manufacturing, enabling ±2.5% total output voltage tolerance across –40°C to 125°C junction temperature, 3–6-V input, and 0–3-A load. Undervoltage lockout (2.95 V start / 2.80 V stop) and thermal shutdown (150°C trip / 140°C hysteresis) provide system-level fault protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltage | Fixed 1.5 V with ±2.5% tolerance over full temp/load/input range - enables direct core supply for 1.5-V I/O standards without external feedback resistors. |
| Continuous output current | 3 A - supports mid-power FPGA, DSP, and ASIC core rails without external current sharing. |
| Input voltage range | 3 V to 6 V - compatible with 3.3-V and 5-V intermediate bus architectures in networking and industrial systems. |
| Switching frequency | Adjustable 280–700 kHz via RT resistor (e.g., 100 kΩ → 500 kHz) - allows optimization of size vs. efficiency and EMI filtering requirements. |
| Internal slow-start time | 5.6 ms - ensures controlled ramp-up of 1.5-V output to prevent inrush current in dense PCB layouts. |
| Powergood threshold | 90% of Vref (0.802 V) with 3% hysteresis - provides reliable reset signaling for processors requiring precise supply monitoring. |
| Junction-to-ambient RθJA | 26.0 °C/W (with PowerPAD soldered) - enables 3-A operation at up to 85°C ambient without forced airflow when using recommended PCB layout. |
Pinout & Package
TPS54313PWPR is housed in a thermally enhanced 20-pin HTSSOP (PWP) package with exposed PowerPAD™ for low-thermal-resistance mounting to PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AGND (Pin 1) | Analog ground reference | Return node for compensation network, SS/ENA capacitor, VBIAS bypass, and RT/FSEL bias - must be connected to PowerPAD for stability. |
| VSENSE (Pin 2) | Error amplifier inverting input | Direct connection to output voltage sense point - determines regulation accuracy and loop stability; requires Kelvin trace routing. |
| NC (Pin 3) | No internal connection | Unbonded pad - must remain unconnected and not tied to any net to avoid parasitic coupling. |
| PWRGD (Pin 4) | Open-drain powergood indicator | Pulled low if VSENSE < 90% Vref, SS/ENA low, or UVLO active - used for processor reset or supply sequencing in multi-rail systems. |
| BOOT (Pin 5) | Bootstrap supply for high-side driver | Connects 0.022–0.1-µF ceramic capacitor to PH - enables floating gate drive for integrated high-side MOSFET without external charge pump. |
| PH (Pins 6–10) | Phase node (switching node) | Junction of internal high/low-side FETs and output inductor - requires short, low-inductance layout to minimize EMI and switching losses. |
| RT (Pin 20) | Frequency setting resistor input | Connect resistor to AGND to set switching frequency from 280–700 kHz - enables EMI tuning and inductor size optimization. |
| SS/ENA (Pin 18) | Slow-start/enable control | Logic-high (>1.2 V) enables device; capacitor to AGND extends startup time - supports power sequencing and inrush limiting. |
| VBIAS (Pin 17) | Bias regulator output | Supplies 2.7–2.9 V to internal circuitry; bypass with 0.1–1.0-µF X7R/X5R ceramic to AGND - critical for noise immunity and startup reliability. |
| VIN (Pins 14–16) | Main input supply | 3–6 V input for power switches and bias regulator - requires local 1–10-µF low-ESR ceramic bypass to PGND near package edge. |
| PGND (Pins 11–13) | Power ground return | High-current return path for low-side FET and input/output capacitors - must be tied to large copper pour and PowerPAD with multiple vias. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 60-mΩ MOSFETs | Enables 3-A continuous output with >90% efficiency at 1.5 V/3 A from 5-V input - eliminates external switch selection and gate-drive design effort. |
| Internally compensated control loop | Reduces BOM count by removing external compensation components - supports stable operation with standard 4.7–10-µH inductors and ceramic output capacitors. |
| Fast transient response (10–20 µs recovery) | Maintains <±2% output deviation during 1-A step load changes - critical for powering burst-mode logic cores in networking ASICs. |
| Thermally enhanced HTSSOP-20 PowerPAD™ | 26.0 °C/W RθJA enables full 3-A output at 85°C ambient with minimal heatsinking - reduces system footprint versus QFN or SOIC alternatives. |
| Powergood (PWRGD) with hysteresis | Provides clean, noise-immune reset signal for downstream logic - eliminates need for external supervisor IC in space-constrained designs. |
Applications
| Telecom Point-of-Load Regulation | Industrial FPGA Core Supply |
|---|---|
|
Use Scenario: Providing tightly regulated 1.5-V core voltage to Xilinx Artix-7 FPGA in 5G remote radio unit with strict thermal constraints. IC Role / Device Role / Timing Role: Primary DC-DC converter delivering 3-A continuous current with fast transient response to handle logic switching bursts. Use Value: Internal compensation and 5.6-ms slow-start eliminate external loop tuning effort while ensuring reliable startup under cold-temperature conditions. |
Use Scenario: Powering Altera Cyclone V SoC core rail in factory automation controller operating continuously at 70°C ambient. IC Role / Device Role / Timing Role: Synchronous buck regulator with integrated MOSFETs and PowerPAD™ thermal interface. Use Value: 26.0 °C/W RθJA enables full-rated 3-A output without heatsink, reducing board area and assembly cost in sealed enclosures. |
| Optical Transceiver Module | Portable Test Equipment |
|
Use Scenario: Generating 1.5-V supply for 100G coherent DSP in compact pluggable optical module with limited PCB real estate. IC Role / Device Role / Timing Role: Compact, high-efficiency buck converter with fixed-output voltage and integrated power switches. Use Value: HTSSOP-20 package with PowerPAD™ achieves 3-A capability in <100 mm² footprint - critical for multi-channel modules. |
Use Scenario: Supplying 1.5-V core voltage to ARM Cortex-A9 processor in handheld spectrum analyzer with battery life constraints. IC Role / Device Role / Timing Role: Efficient synchronous buck regulator supporting dynamic voltage scaling during measurement cycles. Use Value: Adjustable 280–700-kHz switching frequency allows optimizing efficiency vs. light-load quiescent current (8.4–12.8 mA). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54312PWPR | Fixed 1.2-V output; identical pinout, package, and feature set except output voltage and internal slow-start time (4.5 ms). | Suitable for 1.2-V core rails in lower-voltage SoCs; not interchangeable without redesigning feedback or checking load transient behavior at lower VOUT. | Select TPS54312PWPR only when 1.2-V output is required; verify PWRGD threshold and thermal derating match system needs. |
| TPS54314PWPR | Fixed 1.8-V output; same HTSSOP-20 package, 3-A rating, and functional architecture; slow-start time is 3.3 ms. | Targets 1.8-V I/O or memory interface rails; higher output voltage increases conduction loss but eases input capacitor voltage rating. | Choose TPS54314PWPR for 1.8-V applications; confirm that 1.8-V regulation accuracy and transient response meet timing margin requirements. |
Compared with TPS54312PWPR and TPS54314PWPR, the TPS54313PWPR offers optimal balance for 1.5-V FPGA core supplies - its 5.6-ms slow-start prevents inrush in high-capacitance loads, and its 1.5-V output aligns with common I/O standards while minimizing conduction loss versus 1.8-V variants.
Availability
TPS54313PWPR is available at Aetrix Electronics and suitable for telecom infrastructure, industrial FPGA power delivery, and optical transceiver module designs requiring stable component supply and long-term production continuity.
Supply support for TPS54313PWPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability DC-DC conversion solutions.
The TPS5431x family was designed specifically for low-input-voltage, high-current point-of-load applications in space-constrained systems such as networking equipment, DSP/FPGA boards, and portable instrumentation - emphasizing integration, thermal efficiency, and ease of use.
FAQ
What is the output voltage accuracy of the TPS54313PWPR over temperature and load?
The TPS54313PWPR provides ±2.5% total output voltage tolerance across –40°C to 125°C junction temperature, 3–6-V input, and 0–3-A load. This specification includes initial accuracy (1.0%), line regulation (0.21%/V), load regulation (0.21%/A), and thermal drift - all verified per TI's SLVS416C datasheet Section 6.5.
Can the TPS54313PWPR operate with an input voltage below 3 V?
No. The TPS54313PWPR incorporates an undervoltage lockout (UVLO) circuit that disables operation until VIN exceeds 2.95 V. Operation below 3 V is not supported, and attempting to power the device at 2.8 V or lower will result in shutdown - consistent with absolute maximum ratings and recommended operating conditions in the datasheet.
How does the RT pin configure switching frequency on the TPS54313PWPR?
The RT pin sets switching frequency by connecting a resistor to AGND: 180 kΩ yields ~280 kHz, 100 kΩ yields ~500 kHz, and 68 kΩ yields ~700 kHz. The FSEL pin must be left floating for external RT configuration. Frequency accuracy is ±10% over temperature and process variation, as specified in Section 6.5 of the TPS54313PWPR datasheet.
What thermal derating applies to the TPS54313PWPR at 100°C ambient?
At 100°C ambient, the TPS54313PWPR must be derated due to its 26.0 °C/W RθJA and 125°C max junction temperature. With 25°C temperature rise allowed (125°C − 100°C), maximum continuous power dissipation is ~0.96 W - corresponding to ~2.2 A output current at 1.5 V assuming typical efficiency. Full 3-A operation requires ≤85°C ambient or enhanced PCB cooling.
Is the TPS54313PWPR pin-compatible with other TPS5431x variants?
Yes. All TPS5431x devices (TPS54311 through TPS54316) share identical HTSSOP-20 (PWP) packaging, pinout, and electrical interface - including VSENSE, BOOT, PH, PWRGD, and SS/ENA functions. Only output voltage, internal slow-start time, and minor parameter tolerances differ between variants; no PCB layout change is needed when substituting within the family.
TPS54313PWPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 1.5V
- Voltage - Output (Max):
- -
- Current - Output:
- 3A
- Frequency - Switching:
- 350kHz, 550kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS54313PWPR FAQ
1.How can I place an order for TPS54313PWPR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54313PWPR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54313PWPR reliable?
The price and inventory of TPS54313PWPR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54313PWPR is usually 5 days.
3.What payment methods are accepted for TPS54313PWPR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54313PWPR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54313PWPR?
TPS54313PWPR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54313PWPR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54313PWPR?
For technical support, including TPS54313PWPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54313PWPR requirements.
6.How does Aetrix verify that TPS54313PWPR is sourced from the original manufacturer or authorized distributors?
All TPS54313PWPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54313PWPR meets industry standards.
7.What is the process for return or replacement of TPS54313PWPR?
All TPS54313PWPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS54313PWPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54313PWPR part is unused and in its original packaging.
Return procedure for TPS54313PWPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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