Texas Instruments TPS54325TPWPRQ1
- Part No.:
- TPS54325TPWPRQ1
- Manufacturer:
- Texas Instruments
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54325TPWPRQ1.pdf
- Description:
- IC REG BUCK ADJ 3A 14HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS54325TPWPRQ1 from Texas Instruments is an automotive-grade, 3-A synchronous step-down DC/DC converter with integrated high-side (120 mΩ) and low-side (70 mΩ) N-channel MOSFETs, D-CAP2™ adaptive on-time control, 700-kHz switching frequency, and 0.76-V to 5.5-V adjustable output voltage - used in digital TV power supplies and Blue-ray Disc™ player main rail regulation.
For engineers reviewing the TPS54325TPWPRQ1 datasheet, TPS54325TPWPRQ1 pinout, TPS54325TPWPRQ1 application, or TPS54325TPWPRQ1 equivalent, key selection criteria include automotive AEC-Q100 qualification, prebiased soft-start capability, power-good signaling, ceramic-capacitor compatibility, and thermal performance in HTSSOP-14 with exposed PowerPAD™.
Technical Context
The TPS54325TPWPRQ1 implements D-CAP2™ mode control using adaptive on-time PWM with internal ramp compensation - enabling stable operation with zero external compensation and support for ultra-low-ESR ceramic output capacitors. Its proprietary current-sensing architecture uses PGND–SW voltage drop with temperature-compensated RDS(on) monitoring for cycle-by-cycle overcurrent protection.
It integrates a 5.5-V VREG5 LDO (±2% accuracy, 10-mA max load), adjustable soft-start via external capacitor (2.0-μA charge current), and dual ground paths (PGND1/PGND2) for accurate current sensing and minimized noise coupling. The device operates across –40°C to +105°C ambient and features non-latching UVLO (3.7 V typ), thermal shutdown (150°C), and output discharge control (50-Ω internal FET).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | VIN: 2.0–18 V; VCC: 4.5–18 V - supports wide automotive battery transients and dual-supply flexibility. |
| Output Current | 3 A continuous - sufficient for SoC core rails and FPGA I/O banks in infotainment systems. |
| Switching Frequency | 700 kHz nominal - balances EMI, efficiency, and inductor size; varies <5% with input/output changes. |
| Feedback Reference | 0.765 V ±1.3% (–40°C to +105°C) - enables precise 1.05-V or 1.8-V outputs with standard resistor dividers. |
| Efficiency | 91% at 12 VIN/3.3 VOUT/1.2 A - achieved via low-RDS(on) FETs and optimized gate drive. |
| Shutdown Current | <10 μA - preserves battery life in always-on automotive modules during sleep mode. |
| Thermal Resistance | RθJA = 46.3°C/W (HTSSOP-14 with 2-in² 2-oz copper) - enables 3-A operation without forced air in compact layouts. |
Pinout & Package
TPS54325TPWPRQ1 is housed in a 14-pin HTSSOP (PWP) package (5.00 mm × 4.40 mm) with exposed PowerPAD™ thermal pad soldered to PGND for enhanced heat dissipation. The package is qualified per AEC-Q100 Grade 1 (–40°C to +125°C junction).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VO | Output voltage sense and on-time adjustment node | Connects directly to output rail; used internally for adaptive timing - requires Kelvin feedback routing. |
| VFB | Feedback input | Monitors resistor-divider output; 0.765-V reference sets regulation point - tie lower resistor to SGND. |
| VREG5 | 5.5-V LDO output | Powers internal circuitry; requires 1-μF ceramic cap to PGND - not intended for external loads >10 mA. |
| SS | Soft-start control | 2.0-μA current source charges external capacitor - determines ramp time; supports prebiased startup. |
| GND | Signal ground reference | Separate from PGND; connects analog blocks - must tie to PGND at single point near IC. |
| PG | Open-drain power-good indicator | Asserts high after soft-start completion when VOUT is within ±10%; sinks 5 mA max. |
| EN | Enable input | Active-high logic; 2-V threshold - allows direct MCU GPIO control or RC delay sequencing. |
| VCC | Bias supply input | 4.5–18 V; powers control logic - decouple with ≥0.1-μF ceramic close to pin. |
| VIN | Main power input | 2.0–18 V; feeds high-side FET drain - requires local ≥10-μF ceramic bypass. |
| VBST | Bootstrap supply | Drives high-side gate; connect 0.1-μF ceramic between VBST and SW1/SW2 - internal diode from VREG5. |
| SW1, SW2 | Switch nodes | Connect to inductor; serve as current-sense inputs - route with minimal loop area to reduce EMI. |
| PGND1, PGND2 | Power ground returns | Low-side FET sources and current comparator inputs - tie strongly to PowerPAD™ and input/output caps. |
| PowerPAD™ | Thermal and electrical ground | Exposed backside pad - must be soldered to ≥2-in² PGND plane with ≥6 thermal vias for thermal compliance. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ Control Mode | Zero external compensation required; achieves <10-μs transient response with ceramic output capacitors. |
| Prebiased Soft Start | Prevents reverse current flow during startup into precharged rails - critical for hot-swap and multi-rail sequencing. |
| Integrated Power Good | Open-drain PG signal with 10-μs fault response and 1.7× soft-start delay - enables safe system power sequencing. |
| Output Discharge Circuit | 50-Ω internal FET discharges VO when disabled - avoids floating outputs and ensures deterministic reset behavior. |
| AEC-Q100 Qualified | Grade 1 (–40°C to +125°C TJ) with PPAP documentation - validated for automotive infotainment and ADAS subsystems. |
Applications
| Digital TV Power Supply | Blue-ray Disc™ Player |
|---|---|
Use Scenario: Provides stable 1.2-V core and 3.3-V I/O rails for SoC and video processing ASICs under dynamic load conditions. IC Role / Device Role / Timing Role: Primary buck regulator delivering 3-A peak current with fast transient response to handle video decode bursts. Use Value: D-CAP2™ eliminates need for external compensation, reducing BOM count and layout sensitivity while maintaining <10-mV output deviation. | Use Scenario: Powers laser driver, servo controller, and HDMI interface in consumer optical disc players. IC Role / Device Role / Timing Role: Main 5-V-to-1.8-V conversion stage with prebiased soft start to avoid brownout during disc spin-up. Use Value: Integrated 50-Ω discharge FET ensures clean power-down of sensitive analog circuits without external components. |
| Networking Home Terminal | Digital Set Top Box (STB) |
Use Scenario: Supplies 1.05-V CPU core voltage in cable modems and gateway routers with bursty Ethernet traffic loads. IC Role / Device Role / Timing Role: Synchronous buck converter operating at 700 kHz to minimize inductor size while meeting CISPR-22 Class B EMI limits. Use Value: 91% efficiency at 1.2-A load reduces thermal stress in sealed plastic enclosures without heatsinks. | Use Scenario: Generates 1.1-V and 3.3-V rails for QAM demodulator, MPEG decoder, and front-panel display in satellite/cable STBs. IC Role / Device Role / Timing Role: Dual-output capable via resistor divider tuning; PG signal synchronizes firmware boot sequence. Use Value: VREG5 LDO powers internal logic and can bias external level shifters - eliminating need for third rail. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM26420QSQX/NOPB | 2-A dual-channel output; 500-kHz fixed frequency; no prebiased soft start; 0.8-V reference | Preferred for space-constrained dual-rail designs where 3-A single output is unnecessary | Select when needing two independent 2-A outputs with shared enable, not single high-current rail |
| TPS54525TPWPRQ1 | 5-A output; identical pinout, package, and feature set - higher current rating with same footprint | Suitable for next-generation platforms requiring headroom beyond 3 A without layout change | Drop-in upgrade path if future load growth is anticipated; same thermal design applies |
Compared with LM26420QSQX/NOPB, TPS54325TPWPRQ1 delivers 50% higher current in same package with superior transient response and automotive qualification; versus TPS54525TPWPRQ1, it offers cost-optimized 3-A performance with identical layout compatibility and feature parity.
Availability
TPS54325TPWPRQ1 is available at Aetrix Electronics and suitable for automotive infotainment systems, digital broadcast receivers, and networked home terminals requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.
Supply support for TPS54325TPWPRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies - with over 50 years of automotive-grade product development and manufacturing excellence.
The TPS54325TPWPRQ1 belongs to TI's SWIFT™ family of high-efficiency DC/DC converters, designed specifically for cost-sensitive, space-constrained automotive and consumer electronics applications demanding high reliability and simplified design.
FAQ
What is the maximum junction temperature specification for the TPS54325TPWPRQ1?
The TPS54325TPWPRQ1 has a maximum operating junction temperature of 125°C and thermal shutdown triggers at 150°C (typical). Its HTSSOP-14 PowerPAD™ package achieves RθJA = 46.3°C/W with standard PCB layout, enabling full 3-A output at +85°C ambient when properly heatsinked. Derating curves in the datasheet confirm 3-A operation up to +105°C ambient with adequate copper area.
Does the TPS54325TPWPRQ1 support prebiased soft start, and how does it function?
Yes, the TPS54325TPWPRQ1 supports prebiased soft start. When the output is precharged, its internal circuitry gradually activates the low-side FET with narrow on-times, incrementing duty cycle cycle-by-cycle until reaching normal regulation - preventing reverse current flow and ensuring monotonic voltage ramp. This behavior is confirmed in Section 7.3.1 of the datasheet and verified in Figure 8-4 startup waveforms.
What is the recommended bootstrap capacitor value for the TPS54325TPWPRQ1?
Texas Instruments specifies a 0.1-μF ceramic capacitor between VBST and each SW pin (SW1 and SW2) for the TPS54325TPWPRQ1. This value ensures reliable high-side gate drive under worst-case duty cycle and switching conditions. The capacitor must be placed adjacent to the IC with short, low-inductance traces - X7R or better dielectric is recommended for stable capacitance across temperature and bias.
Can the TPS54325TPWPRQ1 operate with only ceramic output capacitors?
Yes, the TPS54325TPWPRQ1 is explicitly designed for ceramic output capacitors. Its D-CAP2™ control architecture includes internal ramp compensation that eliminates reliance on ESR-induced ripple, allowing stable regulation with ultra-low-ESR ceramics. The datasheet recommends ≥20 μF total ceramic capacitance and confirms stability in Figures 8-6 and 8-7 with 100% ceramic output filter networks.
How is power-good (PG) timing coordinated with soft start in the TPS54325TPWPRQ1?
The TPS54325TPWPRQ1 asserts the open-drain PG signal only after soft-start completion - specifically, after 1.7× the calculated soft-start time - to prevent false assertions during voltage ramp. PG goes high when VFB reaches 90% of target and remains high until VFB falls below 85%. This timing relationship is documented in Section 7.3.2 and validated in Figure 8-4, ensuring robust system-level power sequencing for automotive microcontrollers.
TPS54325TPWPRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™, D-CAP2™
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 3A
- Frequency - Switching:
- 700kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
TPS54325TPWPRQ1 FAQ
1.How can I place an order for TPS54325TPWPRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54325TPWPRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54325TPWPRQ1 reliable?
The price and inventory of TPS54325TPWPRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54325TPWPRQ1 is usually 5 days.
3.What payment methods are accepted for TPS54325TPWPRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54325TPWPRQ1 transactions.
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4.How is shipping managed for TPS54325TPWPRQ1?
TPS54325TPWPRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54325TPWPRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54325TPWPRQ1?
For technical support, including TPS54325TPWPRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54325TPWPRQ1 requirements.
6.How does Aetrix verify that TPS54325TPWPRQ1 is sourced from the original manufacturer or authorized distributors?
All TPS54325TPWPRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54325TPWPRQ1 meets industry standards.
7.What is the process for return or replacement of TPS54325TPWPRQ1?
All TPS54325TPWPRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS54325TPWPRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54325TPWPRQ1 part is unused and in its original packaging.
Return procedure for TPS54325TPWPRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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