Texas Instruments TPS54329DDAR
- Part No.:
- TPS54329DDAR
- Manufacturer:
- Texas Instruments
- Package:
- 8-PowerSOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS54329DDAR.pdf
- Description:
- IC REG BUCK ADJ 3A 8SOPWR
- Quantity:
- Payment:

- Shipping:

Inventory:9,231
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Product details
Overview
TPS54329DDAR from Texas Instruments is a 3-A synchronous step-down DC/DC converter with integrated high-side and low-side N-channel MOSFETs, operating from 4.5 V to 18 V input and delivering adjustable output voltage from 0.76 V to 7.0 V. It uses D-CAP2™ adaptive on-time control for fast transient response without external compensation, supports ceramic output capacitors, and features 650-kHz switching frequency, pre-biased soft start, and cycle-by-cycle overcurrent protection - deployed in digital TV power supplies and networking home terminals.
For engineers reviewing the TPS54329DDAR datasheet, TPS54329DDAR pinout, TPS54329DDAR application, or TPS54329DDAR equivalent, key selection considerations include its D-CAP2™ control architecture, 100 mΩ/74 mΩ integrated FET RDS(on), thermal shutdown at 165°C, EN-active-high logic, and SO PowerPAD (DDA) 8-pin package with exposed thermal pad requiring PCB grounding.
Technical Context
The TPS54329DDAR implements D-CAP2™ adaptive on-time PWM control, combining constant on-time operation with internal ripple injection to enable stability with ultra-low-ESR ceramic output capacitors. Its control loop eliminates need for external compensation while maintaining pseudo-fixed 650-kHz switching across input and load variations.
It integrates two N-channel MOSFETs (100 mΩ high-side, 74 mΩ low-side), a 5.5-V VREG5 LDO for gate drive bias, and proprietary pre-biased soft-start circuitry that incrementally enables synchronous rectification to avoid sinking current from pre-charged outputs. Protection includes non-latching cycle-by-cycle OCP, UVLO referenced to VREG5, and thermal shutdown at 165°C with 35°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports wide industrial and consumer DC bus inputs including 5 V, 12 V, and 15 V rails. |
| Output Current | Up to 3 A continuous - sufficient for powering SoCs, FPGAs, and DDR memory subsystems in embedded systems. |
| Output Voltage Range | 0.76 V to 7.0 V - programmable via external resistor divider to match core logic, I/O, or analog supply requirements. |
| Switching Frequency | 650 kHz nominal - enables compact magnetics and filtering while balancing efficiency and EMI performance. |
| FET RDS(on) | 100 mΩ (HS), 74 mΩ (LS) - reduces conduction loss and improves full-load efficiency, especially at lower duty cycles. |
| Soft Start | Adjustable via external capacitor on SS pin - controls output ramp rate to limit inrush current and prevent system brownouts. |
| Shutdown Current | <10 μA - minimizes standby power in battery-backed or always-on applications. |
| VFB Accuracy | ±1.7% (749–781 mV) - ensures tight output regulation across temperature and line/load conditions. |
Pinout & Package
The TPS54329DDAR is housed in an 8-pin SO PowerPAD (DDA) package with exposed thermal pad, designed for surface-mount assembly and direct PCB thermal coupling. The thermal pad must be soldered to a grounded copper plane with multiple vias for optimal heat dissipation (θJA = 42.1°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VBST | Bootstrap supply for high-side gate driver | Connects 0.1 µF capacitor between VBST and SW; internal diode charges from VREG5 - enables high-side FET drive above VIN. |
| VIN | Main input power supply | Accepts 4.5–18 V DC; requires local 10 µF + 0.1 µF ceramic decoupling near pins 2 and 4. |
| SW | Switch node | Connection point between integrated high-side and low-side FETs; critical high-dI/dt node requiring minimal trace area and Kelvin routing. |
| GND | Power ground return | Common return for switching path; must tie sensitive analog returns (SS, VFB) to this pin at single point to avoid noise coupling. |
| VFB | Feedback input | Monitors output via resistor divider; 765 mV reference sets output voltage - high-impedance input (±0.1 µA) demands clean layout. |
| VREG5 | 5.5-V regulated LDO output | Powers internal circuitry and VBST bootstrap; requires 0.47 µF ceramic capacitor to GND - inactive when EN = low. |
| EN | Enable control input | Active-high logic (1.6 V threshold); internal 220–880 kΩ pull-down allows direct MCU GPIO control without external resistor. |
| SS | Soft-start timing control | 6 µA current source charges external capacitor; determines output ramp time - also enables pre-biased startup behavior. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ adaptive on-time control | Eliminates external compensation network and enables stable operation with ceramic output capacitors as low as 20 µF. |
| Integrated 100 mΩ / 74 mΩ MOSFETs | Reduces board area and BOM count while optimizing efficiency at medium-to-high loads (e.g., >1 A) in 12-V input systems. |
| Pre-biased soft start | Prevents reverse current flow during startup into pre-charged outputs - essential for hot-swap and multi-rail sequencing applications. |
| 650-kHz pseudo-constant switching | Provides predictable EMI profile and simplifies filter design compared to variable-frequency controllers. |
| Thermal shutdown with hysteresis | Shuts down at 165°C junction temperature and re-enables only after cooling by 35°C - prevents thermal runaway in sustained overload conditions. |
| VREG5 LDO output | Supplies 5.5 V at up to 60 mA for internal logic and bootstrap charging - removes need for external bias rail in most designs. |
Applications
| Digital TV Power Supply | Networking Home Terminal |
|---|---|
Use Scenario: Powers main SoC, video decoder, and HDMI interface in 4K UHD television platforms with strict standby power and transient response requirements. IC Role / Device Role / Timing Role: Primary 1.05-V or 1.2-V core regulator delivering up to 3 A with sub-100-µs load-step recovery. Use Value: D-CAP2™ control maintains output regulation during rapid CPU/GPU activity bursts without external compensation components. | Use Scenario: Supplies 3.3-V I/O and 1.8-V PHY rails in residential gateways and DOCSIS 3.1 cable modems operating from 12-V wall adapters. IC Role / Device Role / Timing Role: Secondary buck regulator handling dynamic Ethernet and Wi-Fi traffic-induced load transients. Use Value: Pre-biased soft start avoids conflict with upstream PMIC sequencing and prevents bus droop during cold boot. |
| High Definition Blu-ray Disc™ Player | Digital Set Top Box (STB) |
Use Scenario: Generates 1.1-V and 1.5-V rails for BD-ROM controller ASIC and audio DSP under varying disc spin-up and decode workloads. IC Role / Device Role / Timing Role: High-efficiency point-of-load converter with <10 µA shutdown current enabling Energy Star compliance. Use Value: Integrated FETs and 650-kHz switching allow compact 2-layer PCB layout with minimal heatsinking. | Use Scenario: Provides 2.5-V and 3.3-V supplies for conditional access modules and tuner ICs in satellite/cable STBs with ambient temperatures up to 85°C. IC Role / Device Role / Timing Role: Thermally robust buck converter leveraging exposed thermal pad for reliable operation in enclosed chassis. Use Value: Thermal shutdown and cycle-by-cycle OCP ensure safe operation during sustained 3-A loads without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54328DDAR | Same DDA package and pinout; 2-A output rating; identical D-CAP2™ control and feature set except reduced current capability. | Suitable where peak load current remains ≤2 A - offers lower cost and same layout compatibility. | Select TPS54328DDAR only if full 3-A capability is not required; verify inductor saturation margin at 2.5-A peaks. |
| MP2332HGRT-Z | Monolithic 3-A buck with 4.5–28-V input; fixed 650-kHz frequency; no VREG5 output; requires external bootstrap capacitor. | Better suited for higher-input-voltage systems (e.g., 24-V industrial rails); lacks integrated bias LDO and pre-biased soft start. | Choose MP2332HGRT-Z when input exceeds 18 V or when VREG5 functionality is unnecessary; expect additional external component count. |
Compared with TPS54329DDAR, TPS54328DDAR shares identical footprint and control architecture but delivers less output current, while MP2332HGRT-Z extends input range and removes integrated biasing - making TPS54329DDAR optimal for 12-V consumer electronics requiring minimal external components and robust sequencing.
Availability
TPS54329DDAR is available at Aetrix Electronics and suitable for digital TV power supplies, networking home terminals, high-definition Blu-ray Disc™ players, and digital set-top boxes requiring stable component supply across production lifecycles.
Supply support for TPS54329DDAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and power management technologies with over 90 years of innovation history.
The TPS543xx family was designed specifically for high-efficiency, low-component-count DC/DC conversion in space-constrained consumer and computing applications - emphasizing ease of use, fast transient response, and thermal reliability in SO PowerPAD packages.
FAQ
What is the maximum recommended junction temperature for continuous operation of the TPS54329DDAR?
The TPS54329DDAR has a maximum operating junction temperature of 150°C per its recommended operating conditions. Thermal shutdown activates at 165°C (typical) with 35°C hysteresis. For reliable long-term operation, design should maintain TJ ≤125°C under worst-case load, ambient, and airflow conditions - achievable using the exposed thermal pad soldered to a ≥1-in² GND copper area with ≥4 thermal vias.
Does the TPS54329DDAR support pre-biased output startup, and how does it function?
Yes, the TPS54329DDAR supports pre-biased soft start. When the output voltage is already present at startup, the device detects VFB > internal soft-start voltage and initiates synchronous rectification with narrow low-side gate pulses. These pulses incrementally widen cycle-by-cycle until reaching normal duty-cycle operation - preventing reverse current flow and ensuring monotonic output ramp-up. This behavior is inherent to the TPS54329DDAR control architecture and requires no external configuration.
What is the purpose of the VREG5 pin on the TPS54329DDAR, and what load can it drive?
The VREG5 pin on the TPS54329DDAR provides a regulated 5.5-V output capable of sourcing up to 60 mA, used internally for gate drive bias and logic. It powers the VBST bootstrap circuit and may optionally supply external circuitry. A 0.47-µF ceramic capacitor must be placed between VREG5 and GND. The TPS54329DDAR disables VREG5 when EN is low, reducing system standby current.
Can the TPS54329DDAR operate with ceramic output capacitors, and what minimum value is recommended?
Yes, the TPS54329DDAR is explicitly optimized for ceramic output capacitors due to its D-CAP2™ control architecture, which compensates for ultra-low ESR. Texas Instruments recommends 20 µF to 68 µF total ceramic capacitance (e.g., three 10-µF X5R devices). Lower values may be used with careful loop stability verification; the TPS54329DDAR's internal ripple injection ensures stability even with <1-mΩ effective series resistance.
What is the absolute maximum input voltage rating for the TPS54329DDAR, and what happens beyond that limit?
The absolute maximum input voltage (VIN) for the TPS54329DDAR is 20 V, as specified in the Absolute Maximum Ratings table. Exceeding this voltage - even transiently - risks permanent damage to the integrated high-side MOSFET and control circuitry. Input voltage must remain within 4.5 V to 18 V for normal operation; transient spikes above 20 V violate the device's stress limits and void warranty. Use appropriate clamping or filtering if input sources risk overshoot.
TPS54329DDAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™
- Package/Case:
- 8-PowerSOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 7V
- Current - Output:
- 3A
- Frequency - Switching:
- 650kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO PowerPad
TPS54329DDAR FAQ
1.How can I place an order for TPS54329DDAR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54329DDAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54329DDAR reliable?
The price and inventory of TPS54329DDAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54329DDAR is usually 5 days.
3.What payment methods are accepted for TPS54329DDAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54329DDAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54329DDAR?
TPS54329DDAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54329DDAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54329DDAR?
For technical support, including TPS54329DDAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54329DDAR requirements.
6.How does Aetrix verify that TPS54329DDAR is sourced from the original manufacturer or authorized distributors?
All TPS54329DDAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54329DDAR meets industry standards.
7.What is the process for return or replacement of TPS54329DDAR?
All TPS54329DDAR units undergo pre-shipment inspection (PSI). If there is an issue with TPS54329DDAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54329DDAR part is unused and in its original packaging.
Return procedure for TPS54329DDAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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