Texas Instruments TPS54340BDDA
- Part No.:
- TPS54340BDDA
- Manufacturer:
- Texas Instruments
- Package:
- 8-PowerSOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS54340BDDA.pdf
- Description:
- IC REG BUCK ADJ 3.5A 8SOPWR
- Quantity:
- Payment:

- Shipping:

Inventory:1,223
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS54340BDDA from Texas Instruments is a 42-V input, 3.5-A synchronous step-down DC/DC converter with integrated 92-mΩ high-side MOSFET, Eco-mode™ pulse-skipping for light-load efficiency, and adjustable 100-kHz to 2.5-MHz switching frequency. It delivers regulated output voltages as low as 0.8 V in industrial power supplies requiring wide VIN range and thermal robustness.
For engineers reviewing the TPS54340BDDA datasheet, TPS54340BDDA pinout, TPS54340BDDA application, or TPS54340BDDA equivalent, key selection criteria include input UVLO adjustability via EN pin, BOOT-recharge FET for low-dropout operation, cycle-by-cycle current limiting, thermal shutdown at 176°C, and compatibility with external clock synchronization.
Technical Context
The TPS54340BDDA implements fixed-frequency peak-current-mode control with internal slope compensation to prevent subharmonic oscillation above 50% duty cycle. Its transconductance error amplifier (350 μS typical) drives the COMP pin for loop compensation, while the RT/CLK pin supports both resistor-programmed frequency and PLL-synchronized external clock mode.
It integrates a bootstrap recharge FET to sustain high-duty-cycle operation down to near-VOUT, with BOOT-SW UVLO monitoring at 2.1 V. Protection includes thermal shutdown (176°C), overvoltage transient protection (OVP), frequency foldback during overload, and accurate cycle-by-cycle current limit (4.5–6.8 A depending on conditions).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input voltage range | 4.5 V to 42 V - supports 12 V/24 V industrial rails and automotive cold-crank transients up to 42 V. |
| Output current | 3.5 A continuous - sustains full load without derating at TJ ≤ 125°C with proper PCB thermal design. |
| Switching frequency | 100 kHz to 2.5 MHz - enables optimization of inductor size (low f) or efficiency (high f) via RT resistor or external CLK. |
| Quiescent current | 146 μA in Eco-mode - minimizes standby power in always-on systems such as remote sensors or IoT gateways. |
| Voltage reference | 0.8 V ±1% - sets minimum output voltage; enables precise regulation using external FB divider with 1% resistors. |
| High-side RDS(on) | 92 mΩ typical at VBOOT-SW = 6 V - reduces conduction loss and improves full-load efficiency in 5 V/3.3 V conversion. |
| Shutdown current | 2.25 μA max - ensures ultra-low leakage when disabled, critical for battery-backed or energy-harvesting applications. |
| Operating junction temp | –40°C to 150°C - validated for under-hood automotive and industrial environments with no derating up to 125°C. |
Pinout & Package
TPS54340BDDA is housed in an 8-pin HSOIC PowerPAD™ package (4.89 mm × 3.90 mm) with exposed thermal pad electrically connected to GND for enhanced heat dissipation. The PowerPAD must be soldered to a thermally optimized PCB copper area per TI layout guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BOOT | Bootstrap supply node | Connects to SW via 0.1-μF X7R ceramic capacitor; supplies gate drive for high-side MOSFET; monitored for UVLO. |
| VIN | Main input supply | Accepts 4.5–42 V; powers internal circuitry and high-side driver; requires local 10-μF ceramic input capacitance. |
| EN | Enable & UVLO control | Pull below 1.2 V to disable; float or pull above 1.2 V to enable; supports resistor-divider UVLO adjustment. |
| RT/CLK | Frequency programming | Resistor-to-GND sets fSW; pulled above 1.55 V to enter external clock sync mode with PLL lock. |
| FB | Feedback input | Inverting input of error amplifier; connects to resistor divider from VOUT to set output voltage ≥0.8 V. |
| COMP | Error amplifier output | Connects to Type II/III compensation network (R-C-RC) between COMP and GND for loop stability. |
| GND | Analog & power ground | Reference for FB, COMP, EN; must tie to PowerPAD thermal pad and low-impedance PCB ground plane. |
| SW | Switching node | Drain of internal high-side MOSFET; connects to external inductor and low-side diode/FET; high dv/dt node. |
Key Features
| Feature | Design Value |
|---|---|
| Eco-mode™ pulse skipping | Reduces no-load input current to 146 μA by disabling switching until output droop triggers recovery-critical for battery life. |
| Integrated BOOT recharge FET | Enables >95% duty cycle operation without external diode; maintains gate drive during dropout, supporting VOUT ≈ VIN(min). |
| Adjustable UVLO with hysteresis | EN pin allows user-defined start/stop thresholds (e.g., 12 V start / 10.5 V stop) using two resistors and 3.4-μA hysteresis current. |
| Accurate cycle-by-cycle current limit | 4.5–6.8 A limit independent of inductor value or temperature-ensures consistent short-circuit protection across operating conditions. |
| Thermal & OVP protection | 176°C thermal shutdown with 12°C hysteresis; OVP disables high-side switch if VOUT exceeds 106% of setpoint-prevents downstream damage. |
| External clock synchronization | RT/CLK pin accepts 160–2300 kHz external clock; eliminates beat frequencies in multi-rail systems and simplifies EMI filtering. |
Applications
| Industrial Motor Drives | Automotive Body Control Modules |
|---|---|
|
Use Scenario: Powering microcontrollers, CAN transceivers, and sensor interfaces in 24-V chassis systems with load dump immunity. IC Role / Device Role / Timing Role: Primary buck regulator converting 24-V battery rail to 5-V or 3.3-V logic supply with fast transient response. Use Value: 42-V absolute max rating withstands ISO 7637-2 Pulse 5a (75-V/400-ms); Eco-mode extends sleep-mode battery life in parked vehicles. |
Use Scenario: Supplying infotainment head units and ADAS domain controllers where EMI-sensitive analog circuits coexist with digital loads. IC Role / Device Role / Timing Role: Synchronized buck converter locked to system clock to avoid heterodyne interference in RF receivers. Use Value: External clock sync eliminates switching noise peaks in narrowband bands; 0.8-V reference enables precise 1.8-V core rail generation. |
| Ruggedized Communications Equipment | Programmable Logic Controllers (PLCs) |
|
Use Scenario: Converting 48-V PoE++ or telecom -48-V (with polarity inversion) to isolated 12-V/5-V auxiliary rails in outdoor base stations. IC Role / Device Role / Timing Role: High-input-voltage buck stage preceding isolation DC/DC modules; handles wide ambient temperature swings. Use Value: –40°C to 150°C TJ rating ensures reliability in uncooled enclosures; 92-mΩ RDS(on) minimizes heat rise at 3.5-A full load. |
Use Scenario: Providing stable 5-V supply to FPGA configuration memory and I/O banks in factory automation controllers exposed to 24-V DC field wiring. IC Role / Device Role / Timing Role: Input-filtered buck regulator with UVLO hysteresis preventing brownout resets during line fluctuations. Use Value: Adjustable EN-based UVLO avoids nuisance shutdowns during 24-V dips; internal soft-start limits inrush into large FPGA decoupling caps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5164PWPR | 4.5–65-V input, 300-mA IQ, no Eco-mode, 500-kHz fixed fSW, smaller 3.5-A peak current limit | Better suited for ultra-wide VIN (e.g., 48-V solar) but lower efficiency at light loads; lacks RT/CLK flexibility | Select LM5164PWPR only if input exceeds 42 V or if fixed-frequency simplicity outweighs Eco-mode savings. |
| TPS54540DDAR | Same family, 5-A rated, higher RDS(on) (110 mΩ), identical pinout and features except increased current capability | Direct upgrade path for higher output current needs; shares same layout and compensation design | Choose TPS54540DDAR when 5-A continuous output is required and board space/layout reuse is prioritized. |
Compared with LM5164PWPR and TPS54540DDAR, the TPS54340BDDA offers optimal balance of 3.5-A capability, Eco-mode efficiency, and flexible frequency tuning-making it ideal for cost- and thermally constrained 12/24-V industrial designs where 42-V max input suffices.
Availability
TPS54340BDDA is available at Aetrix Electronics and suitable for industrial motor drives, automotive body control modules, ruggedized communications equipment, and programmable logic controllers requiring stable component supply across extended temperature and voltage ranges.
Supply support for TPS54340BDDA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.
The TPS54340B belongs to TI's SWIFT™ DC/DC converter portfolio, designed specifically for high-input-voltage industrial and automotive applications demanding robust thermal performance, wide VIN tolerance, and feature-rich protection.
FAQ
What is the minimum input voltage required for TPS54340BDDA to regulate a 5-V output?
The minimum input voltage depends on output current, inductor DCR, diode forward drop, and MOSFET RDS(on). For a 5-V/3.5-A output with typical components, Equation 1 in the datasheet yields ~6.2 V minimum at full load. At light load, TPS54340BDDA can operate down to ~5.1 V due to its integrated BOOT recharge FET enabling near-100% duty cycle. Always verify using worst-case component tolerances and temperature drift.
Can TPS54340BDDA synchronize to an external clock, and what are the valid frequency and voltage levels?
Yes, TPS54340BDDA supports external clock synchronization via the RT/CLK pin. It accepts TTL/CMOS-compatible clocks from 160 kHz to 2.3 MHz with logic-high threshold of 1.55–2.0 V and logic-low threshold of 0.5–1.2 V. The internal PLL locks within 78 μs, and clock edges must be clean and monotonic; missing edges revert the device to RT-resistor mode.
How does the Eco-mode™ operation of TPS54340BDDA affect output voltage ripple and transient response?
In Eco-mode™, TPS54340BDDA pulses at variable frequency to maintain regulation, increasing low-frequency output ripple (typically <10 mVPP at 24 mA load). Transient response degrades slightly versus forced-PWM mode due to longer off-times, but remains adequate for non-critical logic rails. For sensitive analog loads, disable Eco-mode using the EN pin or select forced-PWM variants like TPS54340DDA (non-B version).
What is the recommended BOOT capacitor value and dielectric type for TPS54340BDDA?
Texas Instruments specifies a 0.1-μF ceramic capacitor between BOOT and SW pins. Use X7R or X5R dielectric with 10-V or higher voltage rating to ensure stable capacitance across temperature and bias. Place the capacitor as close as possible to the pins with short, low-inductance traces; avoid Y5V/Z5U due to severe capacitance loss at DC bias and temperature extremes.
Does TPS54340BDDA require an external catch diode, or is it fully integrated?
TPS54340BDDA integrates the high-side MOSFET and BOOT recharge FET but does not integrate the low-side power path. An external Schottky diode (or synchronous MOSFET driven by a gate driver) is required from SW to GND to complete the buck power stage. The IC monitors BOOT-SW voltage and disables the high-side switch if the BOOT capacitor discharges below 2.1 V, allowing the external diode to conduct and recharge it.
TPS54340BDDA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- Eco-Mode™
- Package/Case:
- 8-PowerSOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 42V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 41.1V
- Current - Output:
- 3.5A
- Frequency - Switching:
- 100kHz ~ 2.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO PowerPad
TPS54340BDDA FAQ
1.How can I place an order for TPS54340BDDA through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54340BDDA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54340BDDA reliable?
The price and inventory of TPS54340BDDA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54340BDDA is usually 5 days.
3.What payment methods are accepted for TPS54340BDDA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54340BDDA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54340BDDA?
TPS54340BDDA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54340BDDA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54340BDDA?
For technical support, including TPS54340BDDA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54340BDDA requirements.
6.How does Aetrix verify that TPS54340BDDA is sourced from the original manufacturer or authorized distributors?
All TPS54340BDDA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54340BDDA meets industry standards.
7.What is the process for return or replacement of TPS54340BDDA?
All TPS54340BDDA units undergo pre-shipment inspection (PSI). If there is an issue with TPS54340BDDA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54340BDDA part is unused and in its original packaging.
Return procedure for TPS54340BDDA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS54340BDDA Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

