Texas Instruments TPS54352PWPRG4
- Part No.:
- TPS54352PWPRG4
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54352PWPRG4.pdf
- Description:
- IC REG BUCK 1.2V 3A 16HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS54352PWPRG4 from Texas Instruments is a 1.2-V fixed-output, 3-A continuous synchronous buck PWM converter with integrated 100-mΩ high-side MOSFET and external low-side gate driver (LSG). It operates from 4.5 V to 20 V input, delivers ±1% output voltage accuracy over load/temperature, supports 250 kHz or 500 kHz fixed switching frequency, and includes power good (PWRGD), enable (ENA), and 180° out-of-phase synchronization (SYNC) for multi-rail point-of-load systems in FPGA and microprocessor core supplies.
For engineers reviewing the TPS54352PWPRG4 datasheet, TPS54352PWPRG4 pinout, TPS54352PWPRG4 application, or TPS54352PWPRG4 equivalent, key selection criteria include its 16-pin TSSOP PowerPAD package with thermal pad, internal slow-start timing (5.9 ms at 250 kHz), UVLO adjustability via external resistor divider, and compatibility with external Schottky diodes or N-channel MOSFETs for low-side conduction.
Technical Context
The TPS54352PWPRG4 implements feed-forward PWM control with an 8 V/V modulator gain, adaptive dead-time logic preventing shoot-through, and a true voltage error amplifier (60 dB open-loop gain, 2 MHz unity-gain bandwidth). Its internal oscillator runs at twice the PWM frequency and supports bidirectional SYNC-output mode when RT is grounded/floating, input mode when RT is resistor-set.
It integrates undervoltage lockout (start threshold 4.49 V, hysteresis 350 mV), thermal shutdown (trip at 165°C, 7°C hysteresis), peak current limiting (4.5 A typ), and hiccup-mode overcurrent protection (4.5 ms recovery at 500 kHz). The VBIAS pin provides a regulated 7.5–8.0 V supply for internal circuitry and external gate drive.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.2 V ±1% over 100 mA–3 A load and −40°C to 125°C junction temperature |
| Input Voltage Range | 4.5 V to 20 V - supports 5 V, 12 V, and 19 V intermediate bus rails |
| Continuous Output Current | 3 A - sustained delivery without thermal derating on standard 2-oz copper PCB with PowerPAD soldered |
| Switching Frequency | 250 kHz or 500 kHz (fixed); selectable via RT pin grounding or floating - enables EMI optimization and inductor size trade-offs |
| High-Side rDS(ON) | 100–200 mΩ at VIN = 12 V - determines conduction loss and thermal rise under full load |
| Power Good Threshold | 97% of nominal output (1.164 V) with 2–4 ms rising-edge delay - provides reliable system sequencing signal |
| UVLO Start/Stop | 4.49 V start / 3.69 V stop (350 mV hysteresis) - prevents erratic startup during brownout conditions |
| Thermal Shutdown | 165°C trip with 7°C hysteresis - protects silicon integrity during overload or poor heatsinking |
Pinout & Package
TPS54352PWPRG4 uses a thermally enhanced 16-pin HTSSOP (PWP) package with exposed PowerPAD for low thermal impedance (42.1°C/W junction-to-ambient with soldered pad). The PowerPAD must be connected to PGND and AGND for proper operation and thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pins 1,2) | Input power supply | Accepts 4.5–20 V; requires local 10-µF ceramic bypass near pins to suppress high-frequency ripple |
| UVLO (Pin 3) | Undervoltage lockout control | External resistor divider overrides default 4.49 V start threshold; internal 320 kΩ/125 kΩ divider |
| PWRGD (Pin 4) | Open-drain power-good indicator | Asserts low if VSENSE < 97% VO, overcurrent, thermal fault, or during slow-start - enables system sequencing |
| RT (Pin 5) | Frequency setting | Ground = 250 kHz; float = 500 kHz; resistor to AGND sets 250–700 kHz - also controls SYNC I/O direction |
| SYNC (Pin 6) | Bidirectional sync interface | Outputs falling edge 180° out-of-phase with PH when RT grounded/floating; accepts falling-edge input when RT resistor-set |
| ENA (Pin 7) | Enable/disable control | <0.5 V disables switching and resets slow-start; internal 5 µA pullup - no external pullup allowed |
| COMP (Pin 8) | Error amplifier output | Internal node - must remain unconnected; not for external compensation |
| VSENSE (Pin 9) | Feedback input | Inverting input of error amp; connects to resistor divider from VO to GND - sets regulation reference |
| AGND (Pin 10) | Analog ground reference | Internally tied to sensitive analog circuits; must connect to PGND and PowerPAD |
| PGND (Pin 11) | Power ground return | Carries high di/dt LSG and MOSFET return currents; ties to AGND and PowerPAD |
| VBIAS (Pin 12) | Internal bias regulator output | Supplies 7.5–8.0 V @ 1 mA; requires 1.0-µF X7R/X5R ceramic bypass to AGND |
| LSG (Pin 13) | Low-side gate driver output | 100-mA sink/source driver for external N-MOSFET; leave open if using Schottky diode |
| PH (Pins 14,15) | Phase node connection | Connects to LC filter inductor; carries high dv/dt switching waveform - layout critical |
| BOOT (Pin 16) | High-side gate bootstrap | Requires 0.1-µF ceramic capacitor to PH; bootstraps high-side driver above VIN |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 100-mΩ high-side MOSFET | Enables compact 3-A solution without external high-side switch; reduces BOM count and layout area |
| 180° out-of-phase synchronization | Reduces RMS input ripple current by ~30% in dual-converter configurations, lowering required input capacitance |
| Internally compensated architecture | Eliminates need for external Type II/III compensation network - simplifies design and improves stability margin |
| Adjustable undervoltage lockout (UVLO) | Allows precise input rail qualification via external resistor divider - critical for multi-rail sequencing in DSP/FPGA systems |
| Internal slow-start with programmable timing | 5.9 ms (10–90%) at 250 kHz prevents inrush current tripping current limit during startup into large capacitive loads |
| Power good (PWRGD) with fault detection | Monitors VSENSE, overcurrent, thermal, UVLO, and slow-start status - provides single-point system power validation |
Applications
| FPGA Core Supply | Industrial PLC I/O Module |
|---|---|
|
Use Scenario: Powers 1.2-V core rail of Xilinx Artix-7 or Intel Cyclone V FPGA under dynamic load transients up to 3 A. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering tightly regulated core voltage with fast transient response. Use Value: Internal 2 MHz error amplifier bandwidth and feed-forward modulation maintain <±15 mV output deviation during 2-A/µs load steps. |
Use Scenario: Generates isolated 1.2-V logic supply for analog-to-digital converter (ADC) front-end in DIN-rail mounted PLC. IC Role / Device Role / Timing Role: Point-of-load DC/DC converter with PWRGD signaling to PLC controller for supply health monitoring. Use Value: 97% PWRGD threshold and 2-ms rising-edge delay ensure clean power-up sequence before ADC initialization. |
| Embedded Microprocessor SoC | Network Switch ASIC Bias Rail |
|
Use Scenario: Supplies 1.2-V core voltage to ARM Cortex-A53-based SoC in industrial gateway with 0–3 A dynamic load profile. IC Role / Device Role / Timing Role: High-efficiency buck converter operating at 500 kHz to minimize inductor size while maintaining >88% efficiency at 2 A. Use Value: 100-mΩ high-side MOSFET and adaptive dead-time control achieve 89.5% peak efficiency at 12 V input / 3.3 A load per Figure 8. |
Use Scenario: Provides stable 1.2-V bias to SerDes PHY blocks in 10-Gbps Ethernet switch ASIC with strict noise requirements. IC Role / Device Role / Timing Role: Low-noise, synchronized buck regulator operating in 180° phase with adjacent 3.3-V rail to cancel input ripple. Use Value: SYNC pin configured as output enables deterministic 180° phase offset, reducing 500-kHz input ripple amplitude by 40% vs. unsynchronized operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54352PWP | No tape-and-reel packaging; same electrical specs and pinout as TPS54352PWPRG4 | Identical functionality but supplied in tube format - suitable for prototyping or low-volume production | Select TPS54352PWP for bench evaluation; TPS54352PWPRG4 for automated SMT assembly |
| MP2332HGRT-P | 3.3-V to 18-V input, 1.2-V fixed output, 3-A, 500-kHz fixed frequency, QFN-10 package | Lacks SYNC, UVLO adjustment, and PWRGD; smaller footprint but no phase synchronization capability | Choose MP2332HGRT-P only if board space is constrained and multi-rail synchronization is unnecessary |
Compared with TPS54352PWPRG4, TPS54352PWP offers identical performance in tube packaging for development use, while MP2332HGRT-P trades synchronization and monitoring features for compact QFN layout - making it viable only where those functions are omitted from system requirements.
Availability
TPS54352PWPRG4 is available at Aetrix Electronics and suitable for FPGA core supplies, industrial PLC I/O modules, and embedded microprocessor SoC power rails requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS54352PWPRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.
The TPS5435x family was designed specifically for point-of-load regulation in high-performance digital systems-including FPGAs, DSPs, ASICs, and microprocessors-where tight voltage tolerance, fast transient response, and multi-rail synchronization are essential.
FAQ
What is the recommended input capacitor for TPS54352PWPRG4?
The TPS54352PWPRG4 requires a minimum 10-µF ceramic capacitor with low ESR placed directly between VIN and PGND pins. TI recommends X7R or X5R dielectric types rated for ≥25 V. For optimal high-frequency ripple suppression, add a parallel 1-µF ceramic capacitor close to the device. Layout best practice mandates shortest possible traces and direct connection to the PowerPAD ground plane.
Can TPS54352PWPRG4 operate without an external low-side MOSFET?
Yes, TPS54352PWPRG4 can operate with only an external Schottky diode connected from PH to PGND. In this configuration, the integrated pulldown MOSFET handles light-load continuous conduction mode. However, full 3-A efficiency requires an external N-channel MOSFET driven by the LSG pin - omitting it increases conduction losses and thermal stress above ~1.5 A.
How is the slow-start time set for TPS54352PWPRG4?
The internal slow-start time of TPS54352PWPRG4 is fixed and determined by switching frequency: 5.9 ms (10–90%) at 250 kHz and 2.9 ms at 500 kHz. It cannot be adjusted externally unless an RC network is added to the ENA pin per Equation (3) in the datasheet. The internal ramp targets 0.891 V reference and ensures controlled output voltage rise without current-limit triggering.
Does TPS54352PWPRG4 support external clock synchronization?
Yes, TPS54352PWPRG4 supports external synchronization via the SYNC pin when a resistor is connected from RT to AGND. In this mode, SYNC becomes a falling-edge-triggered input accepting frequencies from 225 kHz to 770 kHz. The RT resistor must be set to 90–110% of the external clock frequency to ensure stable locking and avoid jitter-induced instability.
What thermal considerations apply to TPS54352PWPRG4's PowerPAD?
The PowerPAD of TPS54352PWPRG4 must be soldered to a minimum 1-in² copper area with ≥4 thermal vias (0.33 mm diameter, 1.5 mm pitch) connecting to inner ground planes. Without soldered PowerPAD, thermal impedance rises from 42.1°C/W to 151.9°C/W - causing >50°C higher junction temperature at 3 A. TI's SLMA002 thermal guidelines specify exact PCB stack-up and via requirements.
TPS54352PWPRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 20V
- Voltage - Output (Min/Fixed):
- 1.2V
- Voltage - Output (Max):
- -
- Current - Output:
- 3A
- Frequency - Switching:
- 250kHz, 500kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
TPS54352PWPRG4 FAQ
1.How can I place an order for TPS54352PWPRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54352PWPRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54352PWPRG4 reliable?
The price and inventory of TPS54352PWPRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54352PWPRG4 is usually 5 days.
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Once your TPS54352PWPRG4 order is processed, you will receive an email with the shipment details and tracking number.
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5.How can I obtain technical support or documentation for TPS54352PWPRG4?
For technical support, including TPS54352PWPRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54352PWPRG4 requirements.
6.How does Aetrix verify that TPS54352PWPRG4 is sourced from the original manufacturer or authorized distributors?
All TPS54352PWPRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54352PWPRG4 meets industry standards.
7.What is the process for return or replacement of TPS54352PWPRG4?
All TPS54352PWPRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS54352PWPRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54352PWPRG4 part is unused and in its original packaging.
Return procedure for TPS54352PWPRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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