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Texas Instruments TPS54372PWPR
- Part No.:
- TPS54372PWPR
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54372PWPR.pdf
- Description:
- IC REG CONV DDR 1OUT 20HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,591
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Product details
Overview
TPS54372PWPR from Texas Instruments is a 3-A synchronous buck PWM converter with integrated high- and low-side MOSFETs, designed for DDR memory termination and precision point-of-load regulation. It operates from 3 V to 6 V input, delivers adjustable output tracking (6%–90% of VI), and supports fixed 350 kHz or adjustable 280–700 kHz switching frequency in a thermally enhanced 20-pin HTSSOP (PWP) PowerPAD™ package.
For engineers reviewing the TPS54372PWPR datasheet, TPS54372PWPR pinout, TPS54372PWPR application, or TPS54372PWPR equivalent, key selection criteria include its integrated FETs (rDS(on) = 59–88 mΩ high-side, 85–136 mΩ low-side at VI = 3–6 V), 0.25 V/ms internal slow-start, ±0.3 V AGND-to-PGND differential limit, thermal shutdown at 150°C, and REFIN voltage range of 0.2 V to 1.75 V for external tracking.
Technical Context
The TPS54372PWPR implements a voltage-mode PWM control architecture with a high-gain error amplifier (90–110 dB open-loop gain, 3–5 MHz unity-gain bandwidth) and adaptive dead-time logic to prevent shoot-through. Its oscillator supports both internal (350 kHz) and resistor-programmable (280–700 kHz) frequencies via the RT pin, with minimum controllable on-time of 200 ns and maximum duty cycle of 90%.
It integrates dual power MOSFETs with matched rDS(on) production testing, a dedicated VBIAS LDO (2.7–2.9 V output), and a true analog ground (AGND) isolated from power ground (PGND) to minimize noise coupling into the feedback path. The device uses cycle-by-cycle peak current limiting (4–7.5 A threshold) and thermal shutdown (150°C trip, 10°C hysteresis) for robust protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.0 V to 6.0 V - supports standard 3.3 V and 5 V rails without external regulators |
| Continuous Output Current | 3 A source/sink - enables active DDR/GTL/SSTL termination with bidirectional current capability |
| Switching Frequency | Fixed 350 kHz or adjustable 280–700 kHz - allows EMI optimization and inductor size trade-offs |
| Output Tracking Range | 6% to 90% of VI - matches VTTQ = 0.5 × VDDQ across wide input variations |
| High-Side rDS(on) | 59–88 mΩ (VI = 6 V) - minimizes conduction loss at full load in compact layout |
| Thermal Shutdown | 150°C trip with 10°C hysteresis - protects against sustained overload or poor heatsinking |
| REFIN Voltage Range | 0.2 V to 1.75 V - accepts direct connection to half-VDDQ references for DDR compliance |
Pinout & Package
TPS54372PWPR is housed in a 20-pin HTSSOP (PWP) PowerPAD™ package measuring 6.4 mm × 6.6 mm, featuring an exposed thermal pad for enhanced junction-to-board thermal transfer (θJA = 26.0°C/W with soldered PowerPAD).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AGND (Pin 1) | Analog ground reference | Return for compensation network, slow-start capacitor, VBIAS bypass, and RT resistor - must be isolated from PGND except at single-point connection |
| VSENSE (Pin 2) | Error amplifier inverting input | Connects to output voltage divider - sets regulation point with high-impedance (60–250 nA bias) sensing |
| COMP (Pin 3) | Error amplifier output | Drives external Type-2/Type-3 compensation network - 1.0–1.4 V/µs slew rate ensures stable loop response |
| STATUS (Pin 4) | Open-drain fault indicator | Asserts low during UVLO, VBIAS undervoltage, or thermal shutdown - sinks 2.5 mA max at 0.3 V saturation |
| BOOT (Pin 5) | Bootstrap supply for high-side driver | Requires 0.022–0.1 µF low-ESR ceramic capacitor to PH - enables floating gate drive without external charge pump |
| PH (Pins 6–10) | Phase node | Junction of internal high-/low-side FETs and output inductor - high di/dt node requiring minimized trace area and proximity to inductor |
| RT (Pin 20) | Oscillator frequency set | Resistor to AGND programs 280–700 kHz; floating defaults to 350 kHz - tolerance impacts frequency accuracy |
| ENA (Pin 19) | Enable control input | Logic-high >1.2 V enables operation; <0.82 V disables - includes 0.03 V hysteresis and 2.5 µs deglitch |
| REFIN (Pin 18) | External tracking reference | High-impedance input (0.2–1.75 V range) - overrides internal bandgap when valid; controls output tracking ratio |
| VBIAS (Pin 17) | Bias regulator output | 2.7–2.9 V LDO supplying internal circuitry - requires 0.1–1.0 µF ceramic bypass to AGND near pin |
| VIN (Pins 14–16) | Main power input | Supplies MOSFET switches and VBIAS LDO - requires local 10 µF X5R/X7R ceramic bypass to PGND |
| PGND (Pins 11–13) | Power ground return | High-current return for low-side FET and input/output capacitors - connect with wide copper areas and separate from AGND |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 60-mΩ MOSFETs | Reduces board area and eliminates external FET selection while maintaining ≥85% efficiency at 3 A (VI = 5 V, VO = 1.25 V) |
| True analog/power ground separation | Prevents PGND noise from corrupting VSENSE/COMP signals - critical for <1% load regulation (0.03%/A) |
| Adjustable 280–700 kHz switching | Enables optimization for size (higher fSW → smaller L/C) or efficiency (lower fSW → reduced switching loss) |
| 0.25 V/ms internal slow-start | Limits inrush current during power-up - prevents input rail collapse and ensures controlled VOUT ramp |
| Open-drain STATUS output | Provides system-level power-good signaling without external pull-up - simplifies sequencing with host controllers |
Applications
| DDR Memory Termination | Active GTL/SSTL Termination |
|---|---|
Use Scenario: Providing precise, bidirectional VTTQ termination for DDR2/DDR3 memory interfaces where VTTQ = 0.5 × VDDQ and must sink/source up to 3 A during data transitions. IC Role / Device Role / Timing Role: Synchronous buck converter operating in tracking mode, using REFIN to follow half-VDDQ and delivering regulated VTTQ with <1% line/load regulation. Use Value: Eliminates discrete termination resistors and external op-amps, reducing BOM count and improving transient response to memory bus activity. | Use Scenario: Supplying actively regulated termination voltage for high-speed GTL+ and SSTL-2 logic families in networking ASICs and FPGA I/O banks. IC Role / Device Role / Timing Role: Precision point-of-load regulator with fast transient response (<25 ms settling for 0→2.25 A step), leveraging internal error amplifier bandwidth and low-ESR output capacitance. Use Value: Maintains signal integrity under dynamic loading by holding VTT within ±15 mV during 1 A/ns edge rates, preventing logic-level violations. |
| DAC-Controlled Output Stage | Precision Point-of-Load Supply |
Use Scenario: Generating programmable termination or bias voltage in test equipment where VOUT is dynamically adjusted via DAC-driven REFIN. IC Role / Device Role / Timing Role: Tracking regulator accepting 0.2–1.75 V analog reference input - enables closed-loop control of output without modifying feedback divider. Use Value: Supports real-time VTT adjustment during system calibration, eliminating need for multiple fixed-output regulators or digital potentiometers. | Use Scenario: Delivering tightly regulated 1.25 V at 3 A to core logic in industrial PLCs or medical imaging processors requiring low-noise, high-reliability power. IC Role / Device Role / Timing Role: High-efficiency synchronous buck with thermal shutdown and current limiting - ensures safe operation under continuous full-load and ambient temperatures up to 85°C. Use Value: Achieves >90% efficiency at full load (VI = 5 V) with minimal thermal rise, enabling fanless enclosure designs and long-term reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54372PWP | Tape-and-reel variant differs only in packaging - identical electrical specs, pinout, and thermal performance | No functional difference; PWP is tray-packaged, PWPR is reel-packaged for automated assembly | Select TPS54372PWPR for SMT production lines requiring tape-and-reel delivery |
| TPS543B20RHLR | Higher current (20 A), different topology (current-mode control), 3.5–18 V input, no REFIN pin | Not suitable for DDR tracking - lacks external reference input and bidirectional current capability | Choose only for high-current non-tracking applications where input voltage exceeds 6 V |
Compared with TPS54372PWP, TPS54372PWPR offers identical functionality with optimized logistics for volume manufacturing; compared with TPS543B20RHLR, it provides essential REFIN-based tracking and 3-A sink/source capability required for DDR/GTL termination, which the higher-current part omits.
Availability
TPS54372PWPR is available at Aetrix Electronics and suitable for DDR memory termination, active GTL/SSTL logic termination, and precision point-of-load power supplies requiring stable component supply, consistent thermal performance, and tape-and-reel compatibility for high-volume SMT assembly.
Supply support for TPS54372PWPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion.
The TPS54372PWPR belongs to TI's SWIFT™ family of synchronous buck regulators, engineered specifically for high-current, low-voltage tracking and termination applications in memory subsystems and high-speed logic interfaces.
FAQ
What is the recommended PCB layout practice for the PowerPAD thermal pad of the TPS54372PWPR?
The PowerPAD of the TPS54372PWPR must be soldered directly to a dedicated thermal plane on the PCB. Use at least six 0.013-inch vias within the exposed pad area and four additional vias under the package perimeter, all connected to an analog ground plane. Avoid solder wicking by using appropriate via plugging or tenting. This configuration achieves θJA = 26.0°C/W and prevents thermal shutdown under 3-A continuous load at TA = 85°C. The TPS54372PWPR datasheet specifies this layout in Figure 9.
Does the TPS54372PWPR support bidirectional current flow for DDR termination?
Yes, the TPS54372PWPR supports continuous 3-A bidirectional current flow - sourcing and sinking up to 3 A - making it suitable for DDR VTTQ termination where current direction reverses during memory read/write cycles. Its synchronous buck architecture with matched high- and low-side MOSFETs enables efficient current reversal without external components. This capability is explicitly confirmed in the TPS54372PWPR datasheet description and transient response graphs.
How does the REFIN pin function in the TPS54372PWPR, and what voltage range is supported?
The REFIN pin of the TPS54372PWPR serves as a high-impedance external reference input that directly controls output voltage tracking. It accepts voltages from 0.2 V to 1.75 V, overriding the internal bandgap reference when valid. For DDR applications, REFIN is typically driven with half of VDDQ (e.g., 1.25 V for 2.5 V VDDQ). The TPS54372PWPR regulates VOUT to match REFIN with 6%–90% of VIN, enabling precise VTTQ generation. This behavior is documented in the TPS54372PWPR datasheet Section 11.2.
What is the purpose of separating AGND and PGND pins on the TPS54372PWPR, and how should they be connected?
The TPS54372PWPR separates AGND (Pins 1, 17, 18, 20) and PGND (Pins 11–13) to isolate noise-sensitive analog circuits (error amplifier, COMP, VSENSE) from high-current power paths. AGND returns compensation components and bias circuits; PGND carries switch-node return current. They must connect at a single point - preferably under the PowerPAD - to prevent ground bounce from degrading regulation accuracy. This separation is critical for achieving the TPS54372PWPR's specified 0.03%/A load regulation.
Can the TPS54372PWPR operate without an external RT resistor, and what is the default switching frequency?
Yes, the TPS54372PWPR operates without an external RT resistor: leaving RT (Pin 20) floating configures the device for its internally set switching frequency of 350 kHz. This default setting is confirmed in the Electrical Characteristics table and DETAILED DESCRIPTION section of the TPS54372PWPR datasheet. When an RT resistor is used (68 kΩ to 180 kΩ to AGND), the frequency becomes adjustable from 280 kHz to 700 kHz per the provided formula.
TPS54372PWPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- SWIFT™
- Package/Case:
- 20-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Converter, DDR
- Voltage - Input:
- 3V ~ 6V
- Number of Outputs:
- 1
- Voltage - Output:
- 0.2V ~ 4.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-HTSSOP
TPS54372PWPR FAQ
1.How can I place an order for TPS54372PWPR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54372PWPR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54372PWPR reliable?
The price and inventory of TPS54372PWPR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54372PWPR is usually 5 days.
3.What payment methods are accepted for TPS54372PWPR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54372PWPR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54372PWPR?
TPS54372PWPR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54372PWPR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54372PWPR?
For technical support, including TPS54372PWPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54372PWPR requirements.
6.How does Aetrix verify that TPS54372PWPR is sourced from the original manufacturer or authorized distributors?
All TPS54372PWPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54372PWPR meets industry standards.
7.What is the process for return or replacement of TPS54372PWPR?
All TPS54372PWPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS54372PWPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54372PWPR part is unused and in its original packaging.
Return procedure for TPS54372PWPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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