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Texas Instruments TPS54373PWPRG4

Part No.:
TPS54373PWPRG4
Manufacturer:
Texas Instruments
Category:
Voltage Regulators - DC DC Switching Regulators
Package:
20-PowerTSSOP (0.173", 4.40mm Width)
Datasheet:
AetrixTPS54373PWPRG4.pdf
Description:
IC REG BUCK ADJ 3A 20HTSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,481

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Product details

Overview

TPS54373PWPRG4 from Texas Instruments is a 3-V to 6-V input, 3-A synchronous buck PWM converter with disabled sinking during start-up, 0.9-V adjustable output (±1.0% accuracy), and selectable switching frequency (350/550 kHz fixed or 280–700 kHz adjustable). It integrates 60-mΩ high- and low-side MOSFETs and delivers point-of-load regulation for FPGAs and DSPs in telecom infrastructure.

For engineers reviewing the TPS54373PWPRG4 datasheet, TPS54373PWPRG4 pinout, TPS54373PWPRG4 application, or TPS54373PWPRG4 equivalent, key selection criteria include start-up current sourcing only (no sinking), thermal shutdown at 150°C, PowerPAD™ TSSOP-20 package, and compatibility with precharged outputs in high-density distributed power systems.

Technical Context

The TPS54373PWPRG4 implements a voltage-mode synchronous buck topology with an integrated high-performance error amplifier (110 dB open-loop gain, 5 MHz unity-gain bandwidth) and adaptive dead-time control. Its DSDS (Disabled Sinking During Start-up) feature suppresses low-side FET conduction until internal reference ramp reaches maximum duty cycle, preventing output capacitor discharge.

It supports three frequency modes: internally fixed (350 kHz or 550 kHz via SYNC logic level), externally resistor-programmed (RT-to-AGND, 280–700 kHz), or synchronized to external clock (330–700 kHz). The VBIAS regulator supplies stable 2.8 V ±0.1 V to internal circuitry and supports external bypassing.

Key Specifications

ParameterValue and Actual Design Meaning
Input Voltage Range3.0 V to 6.0 V - supports standard 3.3-V and 5-V rails without external regulators.
Output Current3 A continuous - sufficient for mid-power FPGA core or I/O supply domains.
Output Voltage Accuracy±1.0% at 0.9 V - enables tight regulation for sensitive digital loads like PowerPC processors.
Switching Frequency280–700 kHz - adjustable via RT resistor or external sync; higher frequencies reduce inductor size.
High-Side rDS(on)59 mΩ @ VI = 6 V - minimizes conduction loss at full load, improving efficiency above 85%.
Thermal Shutdown150°C trip, 10°C hysteresis - protects against sustained overload or poor PCB thermal design.
UVLO Threshold2.95 V start / 2.80 V stop - prevents erratic operation during brown-out conditions on 3.3-V inputs.

Pinout & Package

TPS54373PWPRG4 uses a thermally enhanced 20-pin HTSSOP (PWP) PowerPAD™ package (6.4 mm × 6.6 mm), with exposed thermal pad soldered to AGND for efficient heat dissipation. The package eliminates need for external heatsinks in 3-A applications.

Pin/TerminalCircuit RoleDesign Meaning
AGND (Pin 1)Analog ground referenceReturn for compensation network, VBIAS cap, RT, and SYNC; must connect to PowerPAD and isolated analog ground trace.
VSENSE (Pin 2)Error amplifier inverting inputConnects to output divider; senses regulated voltage with 0.891-V internal reference for ±1% accuracy.
COMP (Pin 3)Error amplifier outputDrives external Type-3 compensation network; 1.4 V/µs slew rate supports fast transient response.
PWRGD (Pin 4)Open-drain power-good flagAsserts high when VSENSE ≥ 90% Vref; used for processor reset sequencing and fault signaling.
BOOT (Pin 5)Bootstrap gate drive supplyRequires 0.022–0.1-µF ceramic cap to PH; enables high-side FET drive above VIN rail.
PH (Pins 6–10)Phase nodeSwitching node connecting internal MOSFETs and output inductor; requires minimized loop area to reduce EMI.
RT (Pin 20)Frequency setting inputResistor to AGND sets free-running frequency (e.g., 71.5 kΩ → 700 kHz); required for sync mode.
SS/ENA (Pin 18)Enable/slow-start controlLogic-enable threshold 1.2 V; internal 3.35-ms slow-start prevents inrush; external cap extends timing.

Key Features

FeatureDesign Value
Disabled sinking during start-up (DSDS)Prevents discharge of precharged output capacitors-critical for hot-swap and multi-rail sequencing.
Integrated 60-mΩ MOSFETsEnables >90% peak efficiency at 3 A without external switches; reduces BOM count and layout area.
Adjustable 0.9-V output with 1.0% accuracySupports modern low-voltage cores (e.g., 0.9-V FPGA banks) with guaranteed regulation tolerance.
PowerPAD™ thermal package20-pin HTSSOP with exposed copper pad lowers θJA to 26 °C/W (with solder), enabling 3-A operation without heatsink.
Synchronizable 280–700 kHz oscillatorEliminates beat frequencies in multi-converter systems; allows EMI spread-spectrum tuning.

Applications

Telecom Point-of-Load RegulationOptical Network Line Cards

Use Scenario: Regulating 1.8-V or 2.5-V supplies for SERDES transceivers on dense line cards with limited board space.

IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 3-A continuous current with fast transient response to handle burst traffic loads.

Use Value: DSDS prevents output droop during hot-insertion; PowerPAD enables compact thermal design in air-cooled chassis.

Use Scenario: Powering FPGA-based packet processing engines in 10G/100G optical modules where EMI compliance is critical.

IC Role / Device Role / Timing Role: Adjustable-frequency buck converter synchronized to system clock to avoid interference with data lanes.

Use Value: 700-kHz operation shrinks filter inductors; ±1% output accuracy ensures signal integrity margin for high-speed interfaces.

FPGA Core SupplyPowerPC Processor Power

Use Scenario: Providing 1.2-V core voltage to Xilinx Artix-7 or Intel Cyclone V FPGAs with dynamic current demands up to 3 A.

IC Role / Device Role / Timing Role: High-efficiency DC/DC converter with programmable soft-start to meet FPGA configuration timing requirements.

Use Value: Internal 3.35-ms slow-start matches FPGA power-on reset windows; VBIAS pin supplies auxiliary bias for external monitoring circuits.

Use Scenario: Delivering tightly regulated 1.0-V or 1.2-V supply to PowerPC e500 or QorIQ processors in industrial control gateways.

IC Role / Device Role / Timing Role: Robust buck regulator with thermal shutdown and UVLO for mission-critical embedded applications.

Use Value: 150°C thermal shutdown and −40°C to 85°C operating range ensure reliability in uncontrolled environments.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck regulator applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
TPS54372PWPRSame PWP package, identical pinout, but lacks DSDS feature and has lower 2.5-A current rating.Not suitable for precharged-output systems; acceptable for non-hot-swap FPGA I/O rails.Select TPS54372PWPR only if DSDS is unnecessary and load current remains ≤2.5 A.
LM2678SDX-ADJ/NOPB5-A capable, but uses external MOSFETs; no integrated PowerPAD; 260-kHz fixed frequency; no sync capability.Requires larger board area and more components; better for high-current, low-frequency, cost-sensitive designs.Choose LM2678SDX-ADJ/NOPB when >3-A output or lower EMI priority outweighs integration benefits.

Compared with TPS54373PWPRG4, TPS54372PWPR offers pin compatibility but sacrifices start-up safety and current capability, while LM2678SDX-ADJ/NOPB trades integration for higher current and lower cost-making TPS54373PWPRG4 optimal for space-constrained, precharge-aware 3-A point-of-load designs.

Availability

TPS54373PWPRG4 is available at Aetrix Electronics and suitable for telecom infrastructure, FPGA power delivery, and optical networking equipment requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for TPS54373PWPRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.

The TPS54373PWPRG4 belongs to TI's SWIFT™ family of synchronous buck regulators, designed specifically for high-density, low-voltage point-of-load applications in communications and computing systems.

FAQ

What is the purpose of the DSDS (Disabled Sinking During Start-up) feature in the TPS54373PWPRG4?

The DSDS feature in the TPS54373PWPRG4 disables the low-side MOSFET during initial start-up to prevent current sinking from precharged output capacitors. This avoids output voltage droop in hot-swap or multi-rail systems. The TPS54373PWPRG4 only sources current until the internal reference ramps fully, after which normal buck operation resumes. This behavior is confirmed in the device's detailed description section and startup waveform diagrams.

Can the TPS54373PWPRG4 be synchronized to an external clock, and what is the supported frequency range?

Yes, the TPS54373PWPRG4 supports external synchronization via the SYNC pin across 330 kHz to 700 kHz. A resistor must be connected from RT to AGND, set to produce a free-running frequency at ~80% of the external clock. This capability is explicitly specified in the Electrical Characteristics table under "Frequency range, SYNC" and validated in Figure 4's externally synchronized frequency plots.

What is the recommended thermal layout for the TPS54373PWPRG4 in a 3-A application?

For 3-A operation, the TPS54373PWPRG4 requires its PowerPAD™ thermally connected to a minimum 3-inch × 3-inch, 1-oz copper analog ground plane using ten vias (six under the pad, four around the perimeter). Layout guidance mandates short, wide traces for VIN/PGND loops and separation of AGND/PGND planes. These requirements are defined in the "Layout Considerations for Thermal Performance" section and verified in the Dissipation Ratings table.

Does the TPS54373PWPRG4 support adjustable output voltage, and what is the minimum achievable value?

Yes, the TPS54373PWPRG4 supports adjustable output voltage down to 0.9 V using an external resistor divider on the VSENSE pin. The internal 0.891-V reference achieves ±1.0% accuracy over temperature and line/load conditions, as confirmed in the Electrical Characteristics table under "Cumulative Reference Vref Accuracy." No lower limit is specified beyond 0.9 V in the datasheet.

How does the SS/ENA pin function in the TPS54373PWPRG4, and what are its dual roles?

The SS/ENA pin in the TPS54373PWPRG4 serves two verified functions: (1) logic enable/disable with 1.2-V threshold and 0.03-V hysteresis, and (2) external slow-start timing via capacitor to AGND. The internal slow-start time is 3.35 ms, and adding capacitance extends this linearly per the equation t(SS) ≈ C(SS) × 0.7 V / 5 µA. Both behaviors are documented in the "Slow-Start/Enable" Electrical Characteristics and Detailed Description sections.

TPS54373PWPRG4 Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
SWIFT™
Package/Case:
20-PowerTSSOP (0.173", 4.40mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Last Time Buy
Function:
Step-Down
Output Configuration:
Positive
Topology:
Buck
Output Type:
Adjustable
Number of Outputs:
1
Voltage - Input (Min):
3V
Voltage - Input (Max):
6V
Voltage - Output (Min/Fixed):
0.891V
Voltage - Output (Max):
3.3V
Current - Output:
3A
Frequency - Switching:
350kHz, 550kHz
Synchronous Rectifier:
Yes
Operating Temperature:
-40°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
20-HTSSOP

TPS54373PWPRG4 FAQ

1.How can I place an order for TPS54373PWPRG4 through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS54373PWPRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS54373PWPRG4 reliable?

The price and inventory of TPS54373PWPRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54373PWPRG4 is usually 5 days.

3.What payment methods are accepted for TPS54373PWPRG4?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54373PWPRG4 transactions.

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TPS54373PWPRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS54373PWPRG4 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS54373PWPRG4?

For technical support, including TPS54373PWPRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54373PWPRG4 requirements.

6.How does Aetrix verify that TPS54373PWPRG4 is sourced from the original manufacturer or authorized distributors?

All TPS54373PWPRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54373PWPRG4 meets industry standards.

7.What is the process for return or replacement of TPS54373PWPRG4?

All TPS54373PWPRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS54373PWPRG4, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS54373PWPRG4 part is unused and in its original packaging.

Return procedure for TPS54373PWPRG4:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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