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Texas Instruments TPS54383PWPRG4
- Part No.:
- TPS54383PWPRG4
- Manufacturer:
- Texas Instruments
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54383PWPRG4.pdf
- Description:
- IC REG BUCK ADJ 3A DL 14HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,016
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Product details
Overview
TPS54383PWPRG4 from Texas Instruments is a dual-output, non-synchronous buck converter IC with integrated 85-mΩ high-side MOSFETs per channel, 300 kHz fixed switching frequency, 4.5–28 V input range, and independent 3-A output capability per channel. It delivers regulated 0.8 V to 90% of VIN on both outputs and supports ratiometric or sequential startup for FPGA, DSP, and multi-rail embedded power systems.
For engineers reviewing the TPS54383PWPRG4 datasheet, TPS54383PWPRG4 pinout, TPS54383PWPRG4 application, or TPS54383PWPRG4 equivalent, key selection considerations include its dual-channel current-mode control, 14-pin HTSSOP PowerPAD™ package with thermal pad, 0.8-V ±1.5% reference accuracy, and three-level ILIM2 programmability for asymmetric load optimization.
Technical Context
The TPS54383PWPRG4 implements current-mode PWM control with internal slope compensation and fully integrated loop compensation-eliminating external compensation components. Each channel features independent enable (EN1/EN2), feedback (FB1/FB2), and bootstrap (BOOT1/BOOT2) circuitry, with shared BP regulator (5.25 V) and oscillator.
It supports dual-supply operation: PVDD1 powers Channel 1's high-side FET only, while PVDD2 supplies control logic, EN pull-ups, and Channel 2's high-side FET. Startup sequencing is configured via SEQ pin (BP/GND/floating), enabling precise 180° out-of-phase dual-PWM timing for reduced input ripple.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 28 V - supports wide industrial and telecom input rails without pre-regulation |
| Switching Frequency | 300 kHz - fixed frequency enables predictable EMI filtering and inductor sizing |
| Output Current (per channel) | Up to 3 A - sustained DC output with thermal derating per junction temperature |
| Feedback Reference Voltage | 0.8 V ±1.5% - sets output voltage via resistor divider; enables 0.8 V minimum rail generation |
| Overcurrent Protection | Channel 1: fixed 4.5 A; Channel 2: selectable 1.5 A / 3.0 A / 4.5 A via ILIM2 pin - allows asymmetrical design optimization |
| Soft-Start Time | 2.1 ms - internally fixed ramp prevents inrush current; not adjustable externally |
| Thermal Shutdown | 148°C with 20°C hysteresis - protects against sustained overload or poor PCB heatsinking |
Pinout & Package
TPS54383PWPRG4 is housed in a 14-pin HTSSOP (PWP) package with exposed thermal pad (4.40 mm × 5.00 mm), requiring solder connection to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PVDD1 (Pin 1) | Power input for Channel 1 high-side MOSFET | Must be bypassed locally with ≥10 μF low-ESR ceramic capacitor; isolated from PVDD2 |
| BOOT1 (Pin 2) | Bootstrap supply for Channel 1 gate driver | Connects via 22–82 nF capacitor to SW1; internal switch charges it during OFF time |
| SW1 (Pin 3) | Switch node for Channel 1 | High dv/dt node; requires snubber network to suppress ringing and EMI |
| GND (Pin 4) | Signal and power ground reference | Connected directly to thermal pad; forms return path for all internal circuits and FET sources |
| EN1 (Pin 5) | Active-low enable for Channel 1 | Logic threshold: <0.9 V enables; >1.55 V disables; floating pulls up to PVDD2 |
| EN2 (Pin 6) | Active-low enable for Channel 2 | Same logic behavior as EN1; independent control enables staggered or selective power-up |
| FB1 (Pin 7) | Voltage feedback input for Channel 1 | Regulates output by comparing divider output to internal 0.8-V reference; no external compensation needed |
| FB2 (Pin 8) | Voltage feedback input for Channel 2 | Identical function to FB1; supports independent output voltage setting per channel |
| ILIM2 (Pin 9) | Channel 2 overcurrent level select | GND = 1.5 A, floating = 3.0 A, BP = 4.5 A - enables component scaling for light-load secondary rail |
| SEQ (Pin 10) | Startup sequencing mode select | BP = CH2→CH1 sequential; GND = CH1→CH2 sequential; floating = ratiometric start |
| BP (Pin 11) | 5.25-V internal bootstrap regulator output | Bypass with 4.7–10 μF X7R/X5R ceramic; powers BOOT1/BOOT2 and internal logic |
| SW2 (Pin 12) | Switch node for Channel 2 | Same high-frequency switching behavior as SW1; requires separate snubber if used independently |
| BOOT2 (Pin 13) | Bootstrap supply for Channel 2 gate driver | Functionally identical to BOOT1; uses same BP supply and external capacitor |
| PVDD2 (Pin 14) | Main power for control circuitry and CH2 FET | UVLO activates at 4.1 V; powers EN pull-ups and internal bias; must be bypassed with ≥10 μF |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3-A non-synchronous buck channels | Enables compact dual-rail power supply without external controllers or discrete FETs |
| Internal 85-mΩ high-side MOSFETs | Reduces BOM count and layout area; eliminates gate driver design and external FET selection |
| 180° out-of-phase PWM outputs | Halves input capacitor RMS current and eases input filter design versus in-phase operation |
| Three-level ILIM2 programming | Allows optimized current-sense resistor and inductor selection for secondary rail with lower load demand |
| Internally compensated current-mode control | Removes need for external compensation network-simplifies design and improves stability margin |
| 2.1-ms fixed soft-start | Prevents input surge and output overshoot without external timing components |
Applications
| FPGA Core & I/O Power | DSP + Memory Subsystem |
|---|---|
|
Use Scenario: Powering Xilinx Artix-7 FPGA with 1.0 V core and 3.3 V I/O banks from single 12 V input. IC Role / Device Role / Timing Role: TPS54383PWPRG4 provides independent, sequenced regulation: CH1 for core (1.0 V), CH2 for I/O (3.3 V), with SEQ = BP ensuring safe I/O-first startup. Use Value: Eliminates need for two discrete converters; 180° phase shift reduces 12 V input ripple by ~30% versus in-phase designs. |
Use Scenario: Supplying TI C6748 DSP (1.2 V core) and DDR2 memory interface (1.8 V) in industrial data acquisition unit. IC Role / Device Role / Timing Role: TPS54383PWPRG4 operates CH1 as main core supply and CH2 as memory rail, with ILIM2 = GND to set 1.5 A limit matching DDR2 peak current. Use Value: Asymmetric current limiting avoids overdesign of CH2 inductor/capacitor, reducing board area and cost by 18% vs fixed 3-A solution. |
| Set-Top Box Dual-Rail System | Digital TV Audio/Video Processing |
|
Use Scenario: Generating 1.2 V processor rail and 3.3 V peripheral rail in cable STB with thermal constraints. IC Role / Device Role / Timing Role: TPS54383PWPRG4 delivers both rails from 19 V adapter; thermal pad tied to 2-layer copper pour ensures TJ ≤125°C at full load. Use Value: Integrated PowerPAD™ package achieves 25.1°C/W junction-to-board thermal resistance-enabling fanless operation in sealed enclosure. |
Use Scenario: Powering video decoder SoC (1.1 V) and audio DAC (3.3 V) in 4K TV main board with strict EMI limits. IC Role / Device Role / Timing Role: TPS54383PWPRG4 runs CH1 and CH2 at 300 kHz with 180° phase offset; SW1/SW2 nodes routed differentially to cancel magnetic fields. Use Value: Phase cancellation reduces conducted EMI at 300 kHz fundamental by 12 dBμV, easing CISPR-32 Class B compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54386PWPR | 600 kHz switching frequency; identical pinout, package, and feature set except oscillator | Requires smaller inductors/capacitors but increases switching losses at high load; better for space-constrained designs | Select TPS54386PWPR when board area is critical and thermal headroom permits higher fSW losses |
| LM26420XMH/NOPB | 2.2-MHz fixed frequency; dual 2-A channels; requires external compensation; no ILIM2 programmability | Lacks asymmetric current limiting and integrated BP regulator; needs more external components | Choose LM26420XMH/NOPB only if 2.2-MHz operation is mandatory and layout supports added compensation parts |
Compared with TPS54383PWPRG4, TPS54386PWPR offers higher frequency for smaller passives but trades off efficiency at 3-A loads, while LM26420XMH/NOPB demands external loop tuning and lacks flexible overcurrent scaling-making TPS54383PWPRG4 optimal for thermally constrained, asymmetric dual-rail systems.
Availability
TPS54383PWPRG4 is available at Aetrix Electronics and suitable for FPGA power delivery, DSP subsystems, and digital TV power management requiring stable component supply across extended production cycles.
Supply support for TPS54383PWPRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design and manufacturing.
The TPS5438x product line was engineered specifically for high-density, dual-rail DC/DC conversion in space- and thermal-constrained consumer and industrial electronics-emphasizing integration, sequencing flexibility, and ease of use.
FAQ
What is the switching frequency of the TPS54383PWPRG4?
The TPS54383PWPRG4 operates at a fixed 300 kHz switching frequency. This value is factory-trimmed and not user-adjustable. It determines the fundamental EMI frequency and directly impacts inductor size and output capacitor ripple current rating. The TPS54383PWPRG4 variant is distinct from the 600 kHz TPS54386PWPR, and the two are not interchangeable without re-evaluating magnetics and thermal performance.
How does the ILIM2 pin configure overcurrent protection on Channel 2 of the TPS54383PWPRG4?
The ILIM2 pin on the TPS54383PWPRG4 selects one of three fixed overcurrent thresholds for Channel 2: 1.5 A (pin tied to GND), 3.0 A (pin left floating), or 4.5 A (pin tied to BP). This allows designers to scale external components-such as the output inductor and current-sense resistor-to match actual load requirements rather than defaulting to full 3-A capability, improving efficiency and reducing cost on lightly loaded secondary rails.
Can the TPS54383PWPRG4 support independent input supplies for each channel?
Yes, the TPS54383PWPRG4 supports dual-supply operation: PVDD1 powers only Channel 1's high-side MOSFET, while PVDD2 powers the control circuitry, EN pull-ups, and Channel 2's high-side MOSFET. This architecture allows Channel 1 to operate from a higher or lower voltage than Channel 2-enabling flexible system-level power partitioning, such as using a dedicated 5 V rail for CH1 and 12 V for CH2, provided both remain within 4.5–28 V.
What is the role of the SEQ pin on the TPS54383PWPRG4, and how does it affect startup behavior?
The SEQ pin on the TPS54383PWPRG4 configures output voltage sequencing: tied to BP enables CH2→CH1 sequential startup (~400 µs delay), tied to GND enables CH1→CH2 sequencing, and left floating enables ratiometric (simultaneous) startup. This single-pin control eliminates external timing ICs and ensures safe power-up order for processors with strict I/O-before-core requirements-critical for reliable operation of FPGAs and application processors.
Does the TPS54383PWPRG4 require external compensation components?
No, the TPS54383PWPRG4 features fully internal loop compensation for both channels. Its current-mode architecture includes built-in slope compensation and transconductance error amplifiers tuned to work with standard LC filter selections. Designers only need to choose appropriate inductor and output capacitor values per the Feedback Loop and L-C Filter Selection guidelines in the datasheet-no external resistors, capacitors, or op-amps are required for stability.
TPS54383PWPRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 28V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 25.2V
- Current - Output:
- 3A
- Frequency - Switching:
- 310kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
TPS54383PWPRG4 FAQ
1.How can I place an order for TPS54383PWPRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54383PWPRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54383PWPRG4 reliable?
The price and inventory of TPS54383PWPRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54383PWPRG4 is usually 5 days.
3.What payment methods are accepted for TPS54383PWPRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54383PWPRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54383PWPRG4?
TPS54383PWPRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54383PWPRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54383PWPRG4?
For technical support, including TPS54383PWPRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54383PWPRG4 requirements.
6.How does Aetrix verify that TPS54383PWPRG4 is sourced from the original manufacturer or authorized distributors?
All TPS54383PWPRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54383PWPRG4 meets industry standards.
7.What is the process for return or replacement of TPS54383PWPRG4?
All TPS54383PWPRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS54383PWPRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54383PWPRG4 part is unused and in its original packaging.
Return procedure for TPS54383PWPRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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