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Texas Instruments TPS54395PWP
- Part No.:
- TPS54395PWP
- Manufacturer:
- Texas Instruments
- Package:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS54395PWP.pdf
- Description:
- IC REG BUCK ADJ 3A DL 16HTSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:215
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Product details
Overview
TPS54395PWP from Texas Instruments is a dual-channel synchronous step-down DC/DC converter with integrated 90 mΩ high-side and 60 mΩ low-side N-channel MOSFETs per channel, supporting 3 A continuous output current per channel, 4.5 V to 18 V input range, 0.76 V to 7.0 V adjustable output voltage, and D-CAP2™ adaptive on-time control for fast transient response in point-of-load digital TV and STB power supplies.
For engineers reviewing the TPS54395PWP datasheet, TPS54395PWP pinout, TPS54395PWP application, or TPS54395PWP equivalent, key selection considerations include dual-channel independent soft-start, non-sinking pre-biased startup, Eco-mode™ light-load efficiency, cycle-by-cycle over-current protection, and thermal shutdown at 155°C - all in a thermally enhanced HTSSOP-16 PowerPAD package.
Technical Context
The TPS54395PWP implements D-CAP2™ control using adaptive on-time PWM with internal ramp injection, enabling stable operation with ceramic or ultra-low-ESR output capacitors without external compensation. Its dual independent control loops support seamless transition between PWM mode (heavy load) and Auto-Skip Eco-mode™ (light load), maintaining >85% efficiency at 10 mA output current.
Each channel features lossless low-side rDS(on) current sensing with thermal compensation (4000 ppm/°C), 700 kHz pseudo-fixed switching frequency set by VIN/VO ratio, and dedicated EN, SS, VFB, VBST, and PGND pins for isolated channel configuration and robust noise immunity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports wide-input industrial and consumer DC bus rails including 5 V, 12 V, and 15 V systems. |
| Output Current (per channel) | 3 A continuous - enables single-chip dual-rail supply for SoC core + I/O or processor + memory subsystems. |
| Output Voltage Range | 0.76 V to 7.0 V - covers DDR termination, FPGA core, DSP, and analog rail requirements via resistor divider feedback. |
| Switching Frequency | 700 kHz nominal - balances EMI performance, inductor size, and efficiency across 4.5–18 V input range. |
| FET RDS(on) | 90 mΩ (HS) / 60 mΩ (LS) - minimizes conduction loss at 3 A, enabling >90% peak efficiency at mid-load with proper layout. |
| Control Mode | D-CAP2™ adaptive on-time - eliminates external compensation, ensures stability with ceramic caps, and delivers <10 µs load transient recovery. |
| Protections | OCL, UVLO (VREG5-based), UVP/OVP, hiccup-mode overload, and thermal shutdown at 155°C - provides fault containment without external circuitry. |
Pinout & Package
TPS54395PWP is housed in a 16-pin HTSSOP (PWP) package with exposed PowerPAD thermal pad, requiring soldering to PCB ground plane for thermal management (θJA = 41.4°C/W, θJCbot = 3.5°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1, VIN2 | Power Input | Independent input rails for each channel; must be decoupled with ≥10 µF ceramic + 0.1 µF local cap per input. |
| VBST1, VBST2 | Bootstrap Supply | Connect 0.1 µF ceramic capacitor to respective SWx pin; powers high-side gate driver during HS FET conduction. |
| SW1, SW2 | Switch Node | Drain-source connection point of internal HS/LF FETs; routes to external inductor; requires tight loop layout to minimize EMI. |
| PGND1, PGND2 | Power Ground | Low-side FET source return; separate per channel to prevent cross-talk; connect directly to PowerPAD and input/output caps. |
| VFB1, VFB2 | Feedback Input | Resistor-divider tap point for output voltage regulation; high-impedance (±0.4 µA bias) with 765 mV reference and ±115 ppm/°C drift. |
| EN1, EN2 | Enable Control | Logic-level inputs (2.0 V H-threshold, 0.4 V L-threshold); enable/disable channels independently; 450 kΩ internal pull-down. |
| SS1, SS2 | Soft-Start | Capacitor-programmable ramp (8 µA charge current); supports non-sinking pre-biased startup to avoid output sinking. |
| VREG5 | Internal LDO Output | 5.5 V regulated supply for internal circuitry; requires ≥1 µF ceramic bypass to GND; powers VBSTx via internal diode. |
| GND | Signal Ground | Analog reference for VFBx, SSx, and ENx; tie to PowerPAD at single-point star ground to minimize noise coupling. |
| Exposed Pad | Thermal & Ground | Must be soldered to PCB ground plane with ≥6 thermal vias; primary heat path; electrically connected to PGND internally. |
Key Features
| Feature | Design Value |
|---|---|
| D-CAP2™ Control | Enables stable regulation with zero external compensation components and compatibility with ceramic, POSCAP, and SP-CAP output capacitors. |
| Auto-Skip Eco-mode™ | Maintains >85% efficiency at 10 mA load per channel by skipping pulses during light-load conditions without audible noise. |
| Non-Sinking Pre-Biased Soft Start | Prevents reverse current flow into pre-biased outputs by ramping low-side gate drive duty cycle gradually from zero. |
| Thermally Compensated OCL | Current limit threshold remains stable across temperature (4000 ppm/°C rDS(on) tracking), ensuring consistent 3.5–6.5 A trip point from –40°C to 85°C. |
| Independent Dual Channels | Separate EN, SS, VFB, VBST, and PGND pins allow asynchronous startup, staggered sequencing, and independent output voltage programming. |
Applications
| Digital TV Power Supply | Networking Home Terminal |
|---|---|
Use Scenario: Powers main SoC (1.2 V core), DDR3 memory (1.5 V), and HDMI PHY (3.3 V) from a 12 V DC input in compact flat-panel TV designs. IC Role / Device Role / Timing Role: Dual-channel buck regulator delivering tightly regulated, low-noise, fast-transient power rails with independent soft-start sequencing. Use Value: Eliminates need for two discrete converters; reduces BOM count by 30%, saves 250 mm² PCB area, and meets <10 mVpp ripple requirement at 3 A load. | Use Scenario: Supplies FPGA I/O bank (2.5 V), transceiver core (1.0 V), and USB controller (3.3 V) in DSL/cable modem gateways with variable AC-DC adapter input. IC Role / Device Role / Timing Role: Dual synchronous buck providing isolated, sequenced, and pre-biased-safe power domains for mixed-signal SoC integration. Use Value: Enables reliable cold-start from 5 V or 12 V adapters; maintains regulation during brownouts down to 4.5 V; supports hiccup-mode fault recovery without system reset. |
| Digital Set Top Box (STB) | Gaming Console Core Supply |
Use Scenario: Generates 1.1 V CPU core and 1.8 V video decoder rails from 12 V input in low-cost HD STB platforms with strict thermal limits. IC Role / Device Role / Timing Role: Dual-channel DC/DC converter with thermal shutdown and Eco-mode™ for fanless enclosure operation. Use Value: Delivers 92% peak efficiency at full load; keeps junction temperature below 100°C under 85°C ambient; eliminates need for heatsink. | Use Scenario: Provides 1.2 V GPU core and 3.3 V peripheral rail in portable gaming handhelds where battery life and thermal density are critical. IC Role / Device Role / Timing Role: High-efficiency dual buck regulator with adaptive light-load operation and fast load-step response for burst-mode graphics workloads. Use Value: Extends runtime by 18% vs fixed-frequency alternatives at 10–100 mA average load; recovers from 0→3 A load step in <5 µs with <30 mV droop. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54394PWP | Same pinout and package; lower 2.5 A per channel rating; identical D-CAP2™ control and feature set. | Suitable for cost-sensitive designs with ≤2.5 A/channel load; reduced thermal margin at full load. | Select when output current demand is ≤2.5 A per rail and board space/layout reuse is prioritized. |
| LM27402SQ/NOPB | 2-phase single-output controller (not dual independent); requires external FETs; no integrated VREG5 or Eco-mode™. | Used in higher-current single-rail applications (up to 10 A); lacks pre-biased soft-start and channel independence. | Choose only for single-output, high-current (>4 A), or design-in flexibility with discrete FET selection. |
Compared with TPS54395PWP, TPS54394PWP offers identical layout compatibility but reduced current headroom, while LM27402SQ/NOPB trades integration for scalability - making TPS54395PWP optimal for space-constrained dual-rail systems needing full integration and reliability.
Availability
TPS54395PWP is available at Aetrix Electronics and suitable for digital TV power supplies, networking home terminals, and gaming console core supplies requiring stable component supply, long-term lifecycle support, and production-ready qualification.
Supply support for TPS54395PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-efficiency DC/DC conversion and automotive-grade reliability.
The TPS54395 belongs to TI's D-CAP2™ synchronous buck converter product line, designed specifically for compact, high-density point-of-load applications in consumer electronics where fast transient response, minimal external components, and thermal efficiency are critical.
FAQ
What is the maximum recommended input voltage for TPS54395PWP?
The absolute maximum input voltage for TPS54395PWP is 20 V, but the recommended operating range is 4.5 V to 18 V. Exceeding 18 V risks violating the recommended conditions and may reduce reliability or trigger UVLO shutdown. The device's VBSTx pins tolerate up to 26 V, and SWx nodes withstand 22 V transients (10 ns), supporting robust operation in noisy 12 V systems. Always maintain input decoupling with ≥10 µF ceramic + 0.1 µF local caps per VIN pin to ensure stable TPS54395PWP operation.
Does TPS54395PWP support pre-biased output startup?
Yes, TPS54395PWP implements non-sinking pre-biased soft start. When the output voltage is already present at startup, the controller avoids pulling current from the rail by initiating low-side FET gate drive with narrow pulse widths and incrementing duty cycle cycle-by-cycle until reaching normal operation. This prevents output voltage collapse and ensures smooth ramp-up from pre-biased conditions - a critical capability for hot-swap and multi-rail sequencing applications. The TPS54395PWP achieves this without external components, unlike many competing dual buck controllers.
What thermal management is required for TPS54395PWP in continuous 3 A operation?
TPS54395PWP requires soldering of its exposed PowerPAD thermal pad to a PCB ground plane with ≥6 thermal vias (0.3 mm diameter, 1.0 mm pitch) to achieve safe junction temperatures. At 12 V input and 3 A per channel, typical power dissipation is ~1.2 W; with θJA = 41.4°C/W, ambient-to-junction rise is ~50°C - keeping TJ below 135°C at 85°C ambient. For sustained 3 A loads, add 2–4 cm² of 2-oz copper connected to the PowerPAD. The TPS54395PWP thermal shutdown activates at 155°C with 25°C hysteresis, providing fail-safe protection.
Can TPS54395PWP operate with ceramic output capacitors only?
Yes, TPS54395PWP is explicitly optimized for ceramic output capacitors via its D-CAP2™ control architecture. Unlike traditional voltage-mode or current-mode controllers, D-CAP2™ uses internal ramp injection and adaptive on-time to maintain stability with near-zero-ESR ceramics (e.g., X5R/X7R 22 µF ×2). The datasheet confirms stable operation with 20–68 µF total ceramic capacitance per channel and no external compensation. Using polymer or electrolytic caps is unnecessary and degrades transient response - the TPS54395PWP achieves <10 µs recovery with ceramic-only output filters.
How does the Eco-mode™ function differ from standard pulse-skipping in TPS54395PWP?
TPS54395PWP's Auto-Skip Eco-mode™ differs from basic pulse-skipping by integrating valley-current detection and seamless PWM-to-Eco transition. When load drops below ~300 mA, the controller detects zero inductor current and disables low-side FET conduction, entering discontinuous conduction mode. Crucially, it retains adaptive on-time timing - preserving 700 kHz pseudo-frequency behavior - rather than reverting to fixed off-time. This avoids subharmonic oscillation and audible noise while maintaining >85% efficiency at 10 mA. Standard skip-mode controllers often exhibit frequency jitter and EMI spikes; TPS54395PWP avoids both.
TPS54395PWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- D-CAP2™, Eco-Mode™
- Package/Case:
- 16-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.76V
- Voltage - Output (Max):
- 7V
- Current - Output:
- 3A
- Frequency - Switching:
- 700kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-HTSSOP
TPS54395PWP FAQ
1.How can I place an order for TPS54395PWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS54395PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS54395PWP reliable?
The price and inventory of TPS54395PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS54395PWP is usually 5 days.
3.What payment methods are accepted for TPS54395PWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS54395PWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS54395PWP?
TPS54395PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS54395PWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS54395PWP?
For technical support, including TPS54395PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS54395PWP requirements.
6.How does Aetrix verify that TPS54395PWP is sourced from the original manufacturer or authorized distributors?
All TPS54395PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS54395PWP meets industry standards.
7.What is the process for return or replacement of TPS54395PWP?
All TPS54395PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS54395PWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS54395PWP part is unused and in its original packaging.
Return procedure for TPS54395PWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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